JPS63100841U - - Google Patents
Info
- Publication number
- JPS63100841U JPS63100841U JP19564186U JP19564186U JPS63100841U JP S63100841 U JPS63100841 U JP S63100841U JP 19564186 U JP19564186 U JP 19564186U JP 19564186 U JP19564186 U JP 19564186U JP S63100841 U JPS63100841 U JP S63100841U
- Authority
- JP
- Japan
- Prior art keywords
- ceramic substrate
- integrated circuit
- circuit device
- hybrid integrated
- insulating material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000919 ceramic Substances 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 3
- 239000011810 insulating material Substances 0.000 claims description 2
- 239000000463 material Substances 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 1
- 239000008188 pellet Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
第1図は本考案の一実施例で、aは部品搭載前
のセラミツク基板の下面を示す図、bは部品搭載
後の混成集積回路装置の平面図、cはその縦断面
図、第2図は従来例である。
1……セラミツク基板、2……プリコート材、
3(1)〜3(3),3′(1)〜3′(2)……導電部、4
……スルーホール、5……絶縁材、6……ペレツ
ト、7……部品、8……半田、9……ボンデイン
グワイヤ。
FIG. 1 shows an embodiment of the present invention, in which a is a diagram showing the bottom surface of a ceramic substrate before components are mounted, b is a plan view of the hybrid integrated circuit device after components are mounted, and c is a vertical cross-sectional view thereof. is a conventional example. 1... Ceramic substrate, 2... Precoat material,
3(1) to 3(3), 3'(1) to 3'(2)... Conductive part, 4
...Through hole, 5...Insulating material, 6...Pellet, 7...Parts, 8...Solder, 9...Bonding wire.
Claims (1)
ミツク基板の所定部位内にあるスルーホールが絶
縁材で充填されていて、前記所定部位内に搭載さ
れた各種部品がプリコート材でおおわれた構造を
有することを特徴とする混成集積回路装置。 The ceramic substrate has a structure in which the through holes are filled with an insulating material and the various components mounted in the predetermined regions are covered with a precoat material. A hybrid integrated circuit device characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19564186U JPS63100841U (en) | 1986-12-18 | 1986-12-18 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19564186U JPS63100841U (en) | 1986-12-18 | 1986-12-18 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63100841U true JPS63100841U (en) | 1988-06-30 |
Family
ID=31153712
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19564186U Pending JPS63100841U (en) | 1986-12-18 | 1986-12-18 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63100841U (en) |
-
1986
- 1986-12-18 JP JP19564186U patent/JPS63100841U/ja active Pending
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