JPS6289331A - 微細パタ−ンの加工方法 - Google Patents

微細パタ−ンの加工方法

Info

Publication number
JPS6289331A
JPS6289331A JP60230356A JP23035685A JPS6289331A JP S6289331 A JPS6289331 A JP S6289331A JP 60230356 A JP60230356 A JP 60230356A JP 23035685 A JP23035685 A JP 23035685A JP S6289331 A JPS6289331 A JP S6289331A
Authority
JP
Japan
Prior art keywords
film
pattern
regions
etched
present
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60230356A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0471334B2 (enExample
Inventor
Isahiro Hasegawa
功宏 長谷川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60230356A priority Critical patent/JPS6289331A/ja
Priority to EP86114222A priority patent/EP0219100A3/en
Priority to KR1019860008630A priority patent/KR900002085B1/ko
Publication of JPS6289331A publication Critical patent/JPS6289331A/ja
Publication of JPH0471334B2 publication Critical patent/JPH0471334B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H10P50/694—
    • H10P50/691—
    • H10P50/242—
    • H10P50/267—
    • H10P50/693—
    • H10P50/71—
    • H10W20/063—

Landscapes

  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP60230356A 1985-10-16 1985-10-16 微細パタ−ンの加工方法 Granted JPS6289331A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP60230356A JPS6289331A (ja) 1985-10-16 1985-10-16 微細パタ−ンの加工方法
EP86114222A EP0219100A3 (en) 1985-10-16 1986-10-14 Method of forming a fine pattern
KR1019860008630A KR900002085B1 (ko) 1985-10-16 1986-10-15 미세패턴 형성방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60230356A JPS6289331A (ja) 1985-10-16 1985-10-16 微細パタ−ンの加工方法

Publications (2)

Publication Number Publication Date
JPS6289331A true JPS6289331A (ja) 1987-04-23
JPH0471334B2 JPH0471334B2 (enExample) 1992-11-13

Family

ID=16906577

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60230356A Granted JPS6289331A (ja) 1985-10-16 1985-10-16 微細パタ−ンの加工方法

Country Status (3)

Country Link
EP (1) EP0219100A3 (enExample)
JP (1) JPS6289331A (enExample)
KR (1) KR900002085B1 (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0497046A (ja) * 1990-08-15 1992-03-30 Kajima Corp 耐震壁の構築方法
JPH0669214A (ja) * 1991-03-01 1994-03-11 Nec Corp 半導体装置
JP2006049425A (ja) * 2004-08-02 2006-02-16 Nec Kagoshima Ltd 積層金属膜のパターン構造及びパターン形成方法並びに該積層金属配線を備える液晶表示装置又は半導体装置
JP2013201168A (ja) * 2012-03-23 2013-10-03 Toshiba Corp 被ダイシング材料、レジスト層形成装置
JP2015046459A (ja) * 2013-08-28 2015-03-12 ソニー株式会社 エッチング方法、電子デバイスの製造方法および偏光板の製造方法

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8701032A (nl) * 1987-05-01 1988-12-01 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting met interconnecties die zowel boven een halfgeleidergebied als boven een daaraan grenzend isolatiegebied liggen.
FR2634322A1 (fr) * 1988-07-13 1990-01-19 Thomson Csf Module semi-conducteur actif hybride obtenu par reconfiguration physique de pastilles, interconnectees par films minces, et procede de fabrication correspondant
FR2681958A1 (fr) * 1991-10-01 1993-04-02 France Telecom Dispositif comportant un modele configure par photogravure, notamment circuit electrique.
JPH07106327A (ja) * 1993-10-06 1995-04-21 Toshiba Corp 半導体装置及びその製造方法
US5589706A (en) * 1995-05-31 1996-12-31 International Business Machines Corp. Fuse link structures through the addition of dummy structures

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5713180A (en) * 1980-06-25 1982-01-23 Fujitsu Ltd Etching method
JPS59115541A (ja) * 1982-12-22 1984-07-04 Toshiba Corp 半導体装置の製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4372807A (en) * 1982-03-25 1983-02-08 Rca Corporation Plasma etching of aluminum
EP0229104A1 (en) * 1985-06-28 1987-07-22 AT&T Corp. Procedure for fabricating devices involving dry etching

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5713180A (en) * 1980-06-25 1982-01-23 Fujitsu Ltd Etching method
JPS59115541A (ja) * 1982-12-22 1984-07-04 Toshiba Corp 半導体装置の製造方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0497046A (ja) * 1990-08-15 1992-03-30 Kajima Corp 耐震壁の構築方法
JPH0669214A (ja) * 1991-03-01 1994-03-11 Nec Corp 半導体装置
JP2006049425A (ja) * 2004-08-02 2006-02-16 Nec Kagoshima Ltd 積層金属膜のパターン構造及びパターン形成方法並びに該積層金属配線を備える液晶表示装置又は半導体装置
JP2013201168A (ja) * 2012-03-23 2013-10-03 Toshiba Corp 被ダイシング材料、レジスト層形成装置
JP2015046459A (ja) * 2013-08-28 2015-03-12 ソニー株式会社 エッチング方法、電子デバイスの製造方法および偏光板の製造方法

Also Published As

Publication number Publication date
EP0219100A3 (en) 1988-06-22
KR870004495A (ko) 1987-05-09
KR900002085B1 (ko) 1990-03-31
JPH0471334B2 (enExample) 1992-11-13
EP0219100A2 (en) 1987-04-22

Similar Documents

Publication Publication Date Title
US5420063A (en) Method of producing a resistor in an integrated circuit
JPS63116430A (ja) マスク形成方法
US20080303141A1 (en) Method for etching a substrate and a device formed using the method
JPS588579B2 (ja) ハンドウタイソウチノセイゾウホウホウ
JPS6289331A (ja) 微細パタ−ンの加工方法
KR100259352B1 (ko) 반도체 소자의 다층막 건식각 방법
US4915779A (en) Residue-free plasma etch of high temperature AlCu
US7737049B2 (en) Method for forming a structure on a substrate and device
US6727179B2 (en) Method for creating an integrated circuit stage wherein fine and large patterns coexist
JPS61185928A (ja) パタ−ン形成法
JP3585039B2 (ja) ホール形成方法
JP2591209B2 (ja) ドライエッチング方法
US20030082899A1 (en) Method of forming interconnects
JPH05343363A (ja) ドライエッチング方法
JP2624181B2 (ja) タングステンのパターン形成方法
JPH07106327A (ja) 半導体装置及びその製造方法
KR100259072B1 (ko) 금속게이트 형성방법
JPS6161423A (ja) ドライエツチング方法
JP3445141B2 (ja) アルミニウム合金配線の形成方法
JPH01243426A (ja) レジスト膜のエツチング方法
JPH04267337A (ja) 半導体装置の製法
JPH03276633A (ja) 半導体装置の製造方法
JPH1174252A (ja) 半導体装置および製造方法
JPH07201821A (ja) アルミ合金配線の形成方法
JPH0429316A (ja) ドライエッチング方法

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term