JPS6274333U - - Google Patents
Info
- Publication number
- JPS6274333U JPS6274333U JP16718585U JP16718585U JPS6274333U JP S6274333 U JPS6274333 U JP S6274333U JP 16718585 U JP16718585 U JP 16718585U JP 16718585 U JP16718585 U JP 16718585U JP S6274333 U JPS6274333 U JP S6274333U
- Authority
- JP
- Japan
- Prior art keywords
- copper
- thick film
- layer
- film conductor
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010408 film Substances 0.000 claims description 6
- 239000004020 conductor Substances 0.000 claims description 5
- 239000010409 thin film Substances 0.000 claims description 3
- 239000012212 insulator Substances 0.000 claims description 2
- 229910052802 copper Inorganic materials 0.000 claims 2
- 239000010949 copper Substances 0.000 claims 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims 1
- ZTXONRUJVYXVTJ-UHFFFAOYSA-N chromium copper Chemical compound [Cr][Cu][Cr] ZTXONRUJVYXVTJ-UHFFFAOYSA-N 0.000 claims 1
- IUYOGGFTLHZHEG-UHFFFAOYSA-N copper titanium Chemical compound [Ti].[Cu] IUYOGGFTLHZHEG-UHFFFAOYSA-N 0.000 claims 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Wire Bonding (AREA)
- Die Bonding (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
第１図は本考案の実施例の断面図で、第２図は
従来基板の代表例の断面図であり、図中で、 １……アルミナセラツク基板、２……第１厚膜
導体層、３……厚膜絶縁体層、４……厚膜抵抗体
層、５……ＮｉＣｒ―Ｃｕ薄膜導体層、６……第
２厚膜導体層、をそれぞれ示す。
従来基板の代表例の断面図であり、図中で、 １……アルミナセラツク基板、２……第１厚膜
導体層、３……厚膜絶縁体層、４……厚膜抵抗体
層、５……ＮｉＣｒ―Ｃｕ薄膜導体層、６……第
２厚膜導体層、をそれぞれ示す。
Claims (1)
- 厚膜導体層、厚膜抵抗体層、厚膜絶縁体層及び
薄膜導体層を有する混成集積回路用基板において
少なくとも、ワイヤボンデイングランド及び部品
搭載ランドをチタン―銅又はクロム―銅又はニク
ロム―銅の銅を主体とした構成の薄膜導体にて形
成したことを特徴とする混成集積回路用基板。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16718585U JPS6274333U (ja) | 1985-10-29 | 1985-10-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16718585U JPS6274333U (ja) | 1985-10-29 | 1985-10-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6274333U true JPS6274333U (ja) | 1987-05-13 |
Family
ID=31098879
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16718585U Pending JPS6274333U (ja) | 1985-10-29 | 1985-10-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6274333U (ja) |
-
1985
- 1985-10-29 JP JP16718585U patent/JPS6274333U/ja active Pending