JPS6243338B2 - - Google Patents

Info

Publication number
JPS6243338B2
JPS6243338B2 JP56142528A JP14252881A JPS6243338B2 JP S6243338 B2 JPS6243338 B2 JP S6243338B2 JP 56142528 A JP56142528 A JP 56142528A JP 14252881 A JP14252881 A JP 14252881A JP S6243338 B2 JPS6243338 B2 JP S6243338B2
Authority
JP
Japan
Prior art keywords
layer
bonding
wiring
pure
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56142528A
Other languages
English (en)
Other versions
JPS5844730A (ja
Inventor
Masamichi Mori
Tetsuya Takayashiki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd filed Critical Nippon Telegraph and Telephone Corp
Priority to JP56142528A priority Critical patent/JPS5844730A/ja
Publication of JPS5844730A publication Critical patent/JPS5844730A/ja
Publication of JPS6243338B2 publication Critical patent/JPS6243338B2/ja
Granted legal-status Critical Current

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    • H—ELECTRICITY
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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)

Description

【発明の詳細な説明】 本発明は、半導体装置の高安定電極・配線に関
するものである。
従来、半導体装置の電極・配線には、純Al又
はSi入りAlが用いられていた。しかし、純Al、Si
入りAlは、Siに対するエレクトロマイグレーシヨ
ン耐量が小さく、高電流密度の電流を流すと、電
極と半導体のコンタクト抵抗が増大する欠点があ
つた。
本発明は、これらの欠点を除去するために、半
導体とのコンタクトをとる電極及び配線にはCu
入りAlを用い、ボンデイングパツド部にボンデ
イングの安定性にすぐれた純Al又はSi入りAlを
用いたもので、その目的は高精度を要求される半
導体装置（例えばアナログIC）の高安定電極・
配線を実現することにある。
以下、本発明を実施例によつて詳細に説明す
る。
第１図は本発明の実施例の構造を示した断面図
である。図において、１は半導体基板（Si基
板）、２は不純物（例えばＰ、As、Ｂ等）を拡散
した拡散層、３は窓明けされた絶縁物（例えば厚
さ0.1〜0.5μｍのSiO2膜）、４はCu入りAl層（Cu
の含有率0.5〜12％）で形成（例えば蒸着、スパ
ツタ等により厚さ１〜２μｍに堆積させ、その後
400〜500℃の熱処理を約10分間施こして安定化す
る。）された電極・配線であり、拡散層２とコン
タクト５で接触している。６はボンデイングの安
定性にすぐれた純Al層又はSi入りAl層（Siの含有
率1.5〜４％、厚さは例えば１〜２μｍ）で、ボ
ンデイングワイヤ７（例えばAl、Au線）がここ
にボンデイング（熱圧着又は超音波ボンデイング
等により）される。
このように構成すると、ボンデイングは純Al
又はSi入りAlによつて安定になり、Cu入りAl電
極を用いたコンタクトでは、以下に述べるように
Si入りAl等を用いた場合に比べコンタクト抵抗の
増大が少なく高安定な電極となる。
第２図は本発明の効果を説明するためのグラフ
であり、10Ωの拡散抵抗体の電極として、従来の
Si入りAlを用いた場合と本発明のCu入りAlを用
いた場合の高温通電試験における抵抗値の経時変
動を示す。この抵抗体（例えばアナログICの高
精度拡散抵抗として用いる。）には、0.5％の精度
が要求されているが、図から明らかなように、Si
入りAlに比べCu入りAlを電極として用いた方が
安定である。
この理由は、Cu入りAlがSiに対するエレクト
ロマイグレーシヨン耐量にすぐれているため、半
導体基板からCu入りAlに溶け込んだSiが移動せ
ずコンタクト部分ですぐにAl中の飽和濃度に達
し、Cu入りAl中にSiが溶け込む反応が止まるか
らである。これに対して、Si入りAlはエレクトロ
マイグレーシヨン耐量が小さいため、コンタクト
近傍のSiがエレクトロマイグレーシヨンにより持
ち去られ、Al中にSiが溶け込む反応が続き、半導
体基板のコンタクト部分にエツチピツト、ボイド
等が形成されコンタクト抵抗が増大することによ
る。
Cu入りAlは以上のように半導体とのコンタク
ト抵抗の安定性にはすぐれるが、膜質が固くボン
デイングの安定性が悪い（付きにくかつたり接着
強度が弱い等）欠点がある。そのため、ボンデイ
ング部にボンデイングの安定性にすぐれた純Al
又はSi入りAlを用いる必要がある。
第３図は本発明のもう一つの実施例の構造を示
した断面図である。図において、前出のものと同
一符号のものは同一又は均等部分を示すものとす
る。この実施例は、第１図の実施例におけるCu
入りAl層４と、純Al又はSi入りAl層６の中間に
例えばMo、Ｗ、Ti等のメタル層８（例えば厚さ
0.1〜1.0μｍ）を入れたものである。このメタル
層８は、ボンデイング前に、保護膜の形成等によ
り400℃程度の高温にさらされる際に、Cu入りAl
層４中のCuが純Al又はSi入りAl層６に拡散する
のを防止する役割をはたす。既に述べたように、
Cu入りAl層は、膜質が固く、ボンデイングにお
いて付きにくかつたり、接着強度が弱いので、
Cuが拡散して純Al又はSi入りAl層の表面にまで
分布すると、ボンデイングがうまくいかなくな
る。メタル層８は、これを防止してボンデイング
の安定性を確保する。
以上説明したように、本発明によれば、半導体
と電極のコンタクト部分におけるコンタクト抵抗
の増大（経時変化）がほとんど無く、かつボンデ
イングの安定性にすぐれた電極・配線が得られ
る。
また、電極・配線形成後に熱処理が加わる場合
でも、メタル層の挿入により、ボンデイングの安
定性は維持され、高安定な電極・配線となる。
【図面の簡単な説明】
第１図及び第３図はそれぞれ本発明の実施例の
構造を示した断面図、第２図は本発明の効果を説
明するためのグラフである。 １…半導体基板、２…拡散層、３…絶縁物、４
…Cu入りAl層、５…半導体と電極のコンタク
ト、６…純Al又はSi入りAl層、７…ボンデイン
グワイヤ、８…メタル層。

Claims (1)

    【特許請求の範囲】
  1. １ 半導体基板とのコンタクトをとる電極及び配
    線にCu入りAl層を用い、ボンデイングパツド部
    は該Cu入りAl層上にCuの拡散を阻止するメタル
    層と該メタル層上に純Al層又はSi入りAl層を備
    えて構成したことを特徴とする半導体装置の電
    極・配線。
JP56142528A 1981-09-11 1981-09-11 半導体装置の電極・配線 Granted JPS5844730A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56142528A JPS5844730A (ja) 1981-09-11 1981-09-11 半導体装置の電極・配線

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56142528A JPS5844730A (ja) 1981-09-11 1981-09-11 半導体装置の電極・配線

Publications (2)

Publication Number Publication Date
JPS5844730A JPS5844730A (ja) 1983-03-15
JPS6243338B2 true JPS6243338B2 (ja) 1987-09-12

Family

ID=15317448

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56142528A Granted JPS5844730A (ja) 1981-09-11 1981-09-11 半導体装置の電極・配線

Country Status (1)

Country Link
JP (1) JPS5844730A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02297519A (ja) * 1989-05-12 1990-12-10 Matsushita Electric Ind Co Ltd 液晶表示装置の駆動方法

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0878410A (ja) * 1994-09-05 1996-03-22 Mitsubishi Electric Corp 配線接続部及びその製造方法
JP6209040B2 (ja) * 2013-09-30 2017-10-04 東芝ホクト電子株式会社 サーマルヘッド

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5119968A (ja) * 1974-08-12 1976-02-17 Hitachi Ltd
JPS55156365A (en) * 1979-05-24 1980-12-05 Toshiba Corp Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5119968A (ja) * 1974-08-12 1976-02-17 Hitachi Ltd
JPS55156365A (en) * 1979-05-24 1980-12-05 Toshiba Corp Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02297519A (ja) * 1989-05-12 1990-12-10 Matsushita Electric Ind Co Ltd 液晶表示装置の駆動方法

Also Published As

Publication number Publication date
JPS5844730A (ja) 1983-03-15

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