JPS6243214B2 - - Google Patents

Info

Publication number
JPS6243214B2
JPS6243214B2 JP56008352A JP835281A JPS6243214B2 JP S6243214 B2 JPS6243214 B2 JP S6243214B2 JP 56008352 A JP56008352 A JP 56008352A JP 835281 A JP835281 A JP 835281A JP S6243214 B2 JPS6243214 B2 JP S6243214B2
Authority
JP
Japan
Prior art keywords
read
memories
address
digital signal
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56008352A
Other languages
English (en)
Japanese (ja)
Other versions
JPS57121734A (en
Inventor
Yoshuki Tsuchikane
Masao Kasuga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Original Assignee
Victor Company of Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd filed Critical Victor Company of Japan Ltd
Priority to JP56008352A priority Critical patent/JPS57121734A/ja
Publication of JPS57121734A publication Critical patent/JPS57121734A/ja
Publication of JPS6243214B2 publication Critical patent/JPS6243214B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
JP56008352A 1981-01-22 1981-01-22 Digital signal processor Granted JPS57121734A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56008352A JPS57121734A (en) 1981-01-22 1981-01-22 Digital signal processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56008352A JPS57121734A (en) 1981-01-22 1981-01-22 Digital signal processor

Publications (2)

Publication Number Publication Date
JPS57121734A JPS57121734A (en) 1982-07-29
JPS6243214B2 true JPS6243214B2 (enExample) 1987-09-11

Family

ID=11690826

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56008352A Granted JPS57121734A (en) 1981-01-22 1981-01-22 Digital signal processor

Country Status (1)

Country Link
JP (1) JPS57121734A (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2535817B2 (ja) * 1985-11-20 1996-09-18 ソニー株式会社 演算処理装置

Also Published As

Publication number Publication date
JPS57121734A (en) 1982-07-29

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