JPS6233485A - 平坦型ジヨセフソン接合素子の作製方法 - Google Patents

平坦型ジヨセフソン接合素子の作製方法

Info

Publication number
JPS6233485A
JPS6233485A JP60172516A JP17251685A JPS6233485A JP S6233485 A JPS6233485 A JP S6233485A JP 60172516 A JP60172516 A JP 60172516A JP 17251685 A JP17251685 A JP 17251685A JP S6233485 A JPS6233485 A JP S6233485A
Authority
JP
Japan
Prior art keywords
pattern
resist
film
sio
development
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60172516A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0513395B2 (enExample
Inventor
Koji Yamada
宏治 山田
Yoshinobu Taruya
良信 樽谷
Shinichiro Yano
振一郎 矢野
Mikio Hirano
幹夫 平野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP60172516A priority Critical patent/JPS6233485A/ja
Publication of JPS6233485A publication Critical patent/JPS6233485A/ja
Publication of JPH0513395B2 publication Critical patent/JPH0513395B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H10N60/0912—Manufacture or treatment of Josephson-effect devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
JP60172516A 1985-08-07 1985-08-07 平坦型ジヨセフソン接合素子の作製方法 Granted JPS6233485A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60172516A JPS6233485A (ja) 1985-08-07 1985-08-07 平坦型ジヨセフソン接合素子の作製方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60172516A JPS6233485A (ja) 1985-08-07 1985-08-07 平坦型ジヨセフソン接合素子の作製方法

Publications (2)

Publication Number Publication Date
JPS6233485A true JPS6233485A (ja) 1987-02-13
JPH0513395B2 JPH0513395B2 (enExample) 1993-02-22

Family

ID=15943404

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60172516A Granted JPS6233485A (ja) 1985-08-07 1985-08-07 平坦型ジヨセフソン接合素子の作製方法

Country Status (1)

Country Link
JP (1) JPS6233485A (enExample)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5710989A (en) * 1980-06-25 1982-01-20 Hitachi Ltd Pattern manufacture for jusephson-junction element
JPS58209183A (ja) * 1982-05-31 1983-12-06 Nec Corp ジヨセフソン接合素子の製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5710989A (en) * 1980-06-25 1982-01-20 Hitachi Ltd Pattern manufacture for jusephson-junction element
JPS58209183A (ja) * 1982-05-31 1983-12-06 Nec Corp ジヨセフソン接合素子の製造方法

Also Published As

Publication number Publication date
JPH0513395B2 (enExample) 1993-02-22

Similar Documents

Publication Publication Date Title
US5023203A (en) Method of patterning fine line width semiconductor topology using a spacer
US4202914A (en) Method of depositing thin films of small dimensions utilizing silicon nitride lift-off mask
JP2553078B2 (ja) マスク形成方法
KR20010029859A (ko) 반도체 장치의 제조 방법
EP0145272B1 (en) Metal/semiconductor deposition
JPS6161280B2 (enExample)
JPH0445974B2 (enExample)
JPH0513395B2 (enExample)
JPH0467333B2 (enExample)
JPS62195190A (ja) プレ−ナ型ジヨセフソン接合素子の形成法
JPH0511432B2 (enExample)
JPH01168080A (ja) ジョセフソン接合素子の作製方法
JPH0142084B2 (enExample)
JPH0313949A (ja) レジストパターンの形成方法
JPS61245585A (ja) ジヨセフソン接合素子の製造方法
JPH05218212A (ja) 半導体装置の製造方法
JPS6086834A (ja) パタ−ンの形成方法
JPS6237972A (ja) 金属電極形成方法
JPS6028237A (ja) 半導体装置の製造方法
JPS5961975A (ja) ジヨセフソン素子とその製造方法
JPS6354726A (ja) レジスト膜のエツチング方法
JPS61263180A (ja) ジヨセフソン接合素子の製造方法
JPH0448788A (ja) ジョセフソン接合素子のパターン形成方法
JPH05283761A (ja) ジョセフソン接合素子のパターン形成方法
JPH04352479A (ja) ジョセフソン接合素子のパターン形成方法

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term