JPS62274777A - Thin-film transistor and manufacture thereof - Google Patents

Abstract

PURPOSE:To realize with facility a microstructure at low temperature by a method wherein a transition metal silicide layer is formed to establish source.drain regions. CONSTITUTION:A polycrystalline silicon thin film to serve as an activation layer 2 is formed on a glass substrate 1, the activation layer 2 is subjeted to patterning, and then a silicon oxide film to serve as a gate insulating film 3 is deposited. On its top, a polycrystalline silicon film is deposited to serve as a gate electrode 4, subjected to patterning, and the gate insulating film 3 is subjected to patterning with the gate electrode 4 serving as a mask. A chrome thin film 6 is deposited, and subjected to thermal treatment for the formation of a chrome silicide layer 7 to serve as a contact forming layer along the interface between the silicon and chrome thin films. The chrome thin film 6 is removed, a silicon oxide film is formed to serve as an insulating layer 8, a contact hole (h) is provided, and then an electrode wiring pattern 9 is formed.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a thin film transistor and a method for manufacturing the same, and particularly relates to the formation of ohmic contact layers for source and drain electrodes.

C. Prior art and its problems] A panel-type display is created by two-dimensionally integrating active matrices on an inexpensive large-area transparent substrate such as glass, and combining this with an optically active material such as liquid crystal. Thin film transistors have attracted attention in recent years because they can be realized.

Incidentally, in a thin film transistor using a polycrystalline silicon thin film as an active layer, undoped polycrystalline silicon is usually used in order to reduce OFF current. (Tokuko Showa 59
-33 Ill No. 77) However, when non-doped polycrystalline silicon is used as the active layer, electrical contact between the source/drain electrodes and the active layer is poor, causing deterioration of device characteristics.

Therefore, in order to improve the electrical contact between the source/drain electrodes and the active layer, impurity atoms are thermally diffused into the source/drain regions, or ions are implanted using an ion implantation method and then annealed. Methods of forming a contact forming layer, etc. have been proposed.

However, both the thermal diffusion process and the annealing process in the ion implantation process are performed at, for example, 1200°C and 100°C, respectively.
In addition to requiring a high-temperature process at 0° C., polycrystalline silicon has a large number of grain boundaries, so diffusion preferentially progresses to the grain boundaries, making it difficult to create a fine structure.

The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide a thin film transistor with good device characteristics without going through a high-temperature process.

[Means for solving problems]

Therefore, in the present invention, a transition metal silicide layer is provided as an ohmic contact forming layer on the surface of the source/drain region of the polycrystalline silicon layer serving as the active layer of the thin film transistor.

Furthermore, in the method of the present invention, in manufacturing a thin film transistor, a transition metal layer is formed on a polycrystalline silicon layer as an active layer, and then heat treatment is performed to form a transition metal layer at the interface between the transition metal layer and the polycrystalline silicon layer. A silicide layer is formed and serves as a contact formation layer to the source/drain regions.

[Effect]

The formation of a transition metal silicide layer through an interfacial reaction between the transition metal and the surface of the silicon layer requires a treatment process at a temperature of about 500°C, which is lower than thermal diffusion or an annealing process after ion implantation. Compared to the case where an ohmic contact forming layer is formed by ion implantation, it is easier to miniaturize the element region.

Preferably, after a gate insulating film and a gate electrode are formed on the polycrystalline silicon layer, a transition metal layer is deposited, heat treated, and then the transition metal layer is removed by etching. As a result, an ohmic contact formation layer is formed in self-alignment because no interfacial reaction occurs on the gate region due to the presence of the gate insulating film.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1(a) to FIG. 1(g) are diagrams showing the manufacturing process of a thin film transistor according to an embodiment of the present invention.

First, as shown in FIG. 1(a), a polycrystalline silicon thin film as an active layer 2 is deposited on a glass substrate 1 by low pressure CVD.

Next, after patterning the polycrystalline silicon thin film by a normal photolithography method, a CV
A silicon oxide film is deposited as the gate insulating film 3 by method D.

Furthermore, a polycrystalline silicon film is deposited as a gate electrode 4 on this upper layer by CVD method, and patterned by normal photolithography method as shown in FIG. 1(c).

Subsequently, the gate insulating film 3 is patterned using the gate electrode 4 as a mask. (Figure 1(d)) After this, the first
As shown in Figure (e), a chromium thin film 6 is formed by sputtering.
After depositing, heat treatment is performed at 500°C for about 30 minutes,
A chromium silicide layer 7 as a contact forming layer is formed at the interface between silicon and the chromium thin film.

Subsequently, as shown in FIG. 1(f), the chromium thin film 6 is removed by etching.

Finally, after forming a silicon oxide film as an insulating layer 8 by CVD and drilling a contact hole h,
An aluminum thin film is deposited by sputtering, and electrode wiring patterns 9 such as source/drain electrodes 9a, 9b are formed through a photolithography process, thereby completing a thin film transistor as shown in FIG. 1(g).

The thin film transistor formed in this way has a low resistance chromium silicide layer interposed between the source/drain electrode and the active layer as a contact formation layer.
The device characteristics are extremely good.

Furthermore, compared to conventional contact formation layers formed by thermal diffusion or ion implantation, it can be formed without going through a high-temperature process and can be formed with good controllability, making it possible to miniaturize the device area.

In addition, in the example, after the chromium thin film was heat-treated, the image shown in Fig. 1 (e
), but if the wiring pattern is not multi-layered, the electrode wiring can be removed selectively by photolithography, leaving only the portion that will become the wiring pattern 90, as shown in FIG. There is no need for a new process of depositing a pattern.

In addition, in the example, a coplanar thin film transistor in which the gate electrode and the source/drain electrodes are on the same side with respect to the active layer has been described, but the application is not limited to the coplanar type, but can also be applied to a staggered thin film transistor. Needless to say, it is.

Furthermore, in the examples, chromium (Cr)' is used as the transition metal.
However, it is needless to say that other transition metals such as tungsten (W) may be used without being limited to chromium.

Further, the active layer, electrode material, insulating film, etc. are not limited to the examples and can be selected as appropriate. Further, the method for forming these films can be appropriately selected from laser annealing, vapor deposition, plasma CVD, CVD, sputtering, and the like.

〔effect〕

As explained above, according to the present invention, a transition metal silicide layer is formed as an ohmic contact formation layer to the source/drain region, so it can be formed in a low temperature process and a fine structure can be easily formed. can be formed.

Further, since a diffusion process or an ion implantation process is not necessary, manufacturing costs are significantly reduced.

[Brief explanation of the drawing]

1A to 1G are manufacturing process diagrams of a thin film transistor according to an embodiment of the present invention, and FIG. 2 is a diagram showing a modification of the same manufacturing process diagram. DESCRIPTION OF SYMBOLS 1...Glass substrate, 2...Active layer, 3...Gate insulating film, 4...Gate electrode, 6...Chromium thin film, 7
... Contact formation layer (chromium silicide), 8 ... Insulating layer, 9 ... Electrode wiring pattern, 9a ... Source, 9
b...Drain. Figure 1 (0) Figure 1 (e) Figure 2

Claims (3)

[Claims] (1) A thin film transistor using a polycrystalline silicon layer as an active layer, characterized in that an ohmic contact forming layer to the source/drain region is composed of a transition metal silicide layer. (2) In a method for manufacturing a thin film transistor using a polycrystalline silicon layer as an active layer, the step of forming an ohmic contact formation layer to the source/drain region is a deposition step of forming a transition metal layer on the polycrystalline silicon layer. , a heating step of performing heat treatment to cause an interfacial reaction at the interface between the polycrystalline silicon layer and the transition metal layer; and a step of forming a transition metal silicide layer. Method. (3) The thin film transistor according to claim (2), wherein the step of forming the ohmic contact forming layer is performed after forming a gate insulating film and a gate electrode on the active layer. manufacturing method.