JP3196241B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION This invention relates to a manufacturing method of a semiconductor device having a thin film transistor is of particular source, to an improved method of forming contact portions between the drain unit wiring layer.

[0002]

2. Description of the Related Art In recent years, high integration and miniaturization of semiconductor devices have been rapidly progressing, and various advances and improvements in various technologies have been remarkable. The wiring technology is no exception, and further improvement is particularly required for the contact hole portion.

FIG. 3 is a sectional view showing the structure of a contact hole in a conventional semiconductor device. In the figure, 1
Denotes a semiconductor substrate made of single crystal silicon or the like; 2 denotes an interlayer insulating film made of an oxide film formed on the semiconductor substrate 1;
Is a gate electrode made of a doped polysilicon film formed on the interlayer insulating film 2; 4 is a gate oxide film formed on the gate electrode 3 and the interlayer insulating film 2; 6 is a source / drain portion formed on the channel polysilicon film 5, 7 is an interlayer insulating film made of an oxide film, 8
Is a contact hole selectively provided in the interlayer insulating film 7, and 9 is a wiring layer made of an aluminum film formed on the interlayer insulating film 7.

Next, a method of manufacturing the semiconductor device configured as described above will be sequentially described with reference to FIGS. First, an interlayer insulating film 2 is formed on a semiconductor substrate 1 to a thickness of about 2000 °, a doped polysilicon film is deposited thereon by a CVD method or the like to a thickness of about 1500 to 2500 °, and photolithography and etching are performed to form a gate electrode 3. (FIG. 4A). Next, a gate oxide film 4 is formed on the entire surface to a thickness of about 150 to 300 ° (FIG. 4B). Next, a polysilicon film is
After depositing about 200 °, an impurity is introduced by, for example, an ion implantation method or the like to form a channel polysilicon film 5. Thereafter, a pattern 5 of a thin film transistor (hereinafter, referred to as TFT) is formed by performing photolithography and etching (FIG. 4C). Next, a resist is applied to the entire surface, and photolithography is performed to form a resist pattern 11. Using the resist pattern 11 as a mask, impurities are introduced by, for example, an ion implantation method or the like to form the source and drain portions 6 of the TFT (FIG. 4D). Thereafter, after removing the resist pattern 11, an oxide film is deposited on the entire surface by a CVD method or the like at a thickness of about 2000 ° to form an interlayer insulating film 7.
Next, after a contact hole 8 is formed by photolithography and etching, a wiring layer 9 made of aluminum is formed by sputtering or the like (FIG. 3).

[0005]

The conventional semiconductor device is configured as described above. Since the channel polysilicon film 5 forming the TFT is very thin as shown in FIG. When the impurities are introduced, the ions penetrate through the polysilicon film 5 and it is difficult to control the ion concentration in the source and drain portions 6 of the TFT, so that the characteristics are varied. Further, since the etching rate ratio between the interlayer insulating film 7 and the channel polysilicon film 5 is about 10, when the channel polysilicon film 5 is thin, when the contact hole 8 is provided in the interlayer insulating film 7, Not only the film 7 but also the source of the TFT,
Only disconnect pokes drain portion 6 causes a variation in characteristics, highly reliable semiconductor device has a problem such not be obtained.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has as its object to provide a method of manufacturing a semiconductor device having good and stable characteristics in a semiconductor device having a TFT.

[0007]

Means for Solving the Problems A method of manufacturing a semiconductor device according to the present invention, a gate electrode provided on the first interlayer insulating film on a semiconductor substrate, provided with a gate insulating film on the gate electrode In a method of manufacturing a semiconductor device having a transistor comprising a semiconductor thin film having a drain and a source region, a semiconductor thin film is provided on a gate insulating film.
Patterning process and photosensitive resin on the semiconductor thin film
After providing and patterning, this photosensitive resin is used as a mask.
Of ion implantation, semiconductor thin film and photosensitivity
A high melting point metal film is deposited on the semiconductor substrate including the entire surface of the resin.
After dissolving the photosensitive resin, ion implantation of the semiconductor thin film
Removing the refractory metal film on the non-processed area;
The heat treatment causes the refractory metal film to react with the semiconductor thin film.
Forming a silicidation layer by sputtering.
It is assumed that.

[0008]

[0009]

According to the present invention, lift-off is performed by using a resist mask for ion implantation into the source and drain portions of the TFT.
The silicon on the surface of the source and drain of the TFT
The pattern layer can be misaligned due to the
Absent.

[0010]

[0011]

[Embodiment 1] An embodiment of the present invention will be described below with reference to the drawings. In addition, the description of the part which overlaps with the description of the related art will be appropriately omitted.

FIG. 1 is a sectional view showing a structure of a contact hole portion of a semiconductor device according to an embodiment of the present invention. In FIG. 1, 1 to 9 are the same as those in the conventional example, and 10 is a TFT. The silicide layer formed on the surface of the source / drain portion 6 constitutes the bottom of the contact hole 8.

FIG. 2 is a sectional view showing a manufacturing process in a contact hole portion of the semiconductor device of FIG. This figure 2
The steps up to (a) are the same as the steps shown in FIGS. 4 (a) to 4 (d), and a detailed description thereof will be omitted. Next, the evaporation method,
Refractory metal film 1 by sputtering or CVD
2. For example, titanium is formed at a thickness of about 100 °, which is の of the thickness of the TFT (FIG. 2A). Next, after removing the high melting <br/> point metal film 12 on the resist pattern 11 and the resist pattern 11 by lift-off method, TFT source, the 6 surfaces of the drain portion silicided by annealing the silicide layer 10, For example, titanium silicide is formed. At this time, the silicide layer 10 is patterned using the resist pattern 11 used in forming the source / drain portions 6, so that the source / drain portions 6 of the TFT and the silicide layer 10 are formed.
Does not cause a pattern shift (FIG. 2B). Next, after the annealed high-melting metal film 12 is removed by an etching method, an oxide film serving as an interlayer insulating film 7 is formed on the entire surface by a CVD method or the like at about 2000 ° (FIG. 2C).
Thereafter, as shown in FIG. 1, a contact hole 8 is formed by photolithography and etching. At this time, the surface of the source / drain portion 6 of the TFT is formed on the silicide layer 10.
Therefore, the etching rate ratio between the interlayer insulating film 7 and the silicide layer 10 is 20: 1 or more,
When providing the contact hole 8 in the interlayer insulating film 7, the TFT
The source and drain portions 6 can be stably formed without excessive etching. Thereafter, an aluminum film is formed by a sputtering method or the like, and an aluminum wiring layer 9 is formed by a photoengraving and etching method. However, the surface of the source and drain portions 6 of the TFT is also a silicide layer 10 here. Contact resistance and source / drain resistance are reduced, and good electrical connection is obtained.

Embodiment 2 FIG. In the above embodiment, the case where titanium was used as the high melting point metal film 12 when forming the silicide layer 10 was shown, but any high melting point metal such as molybdenum, tantalum, platinum, and tungsten may be used. The same effects as in the above embodiment can be obtained.

[0015]

As described above, when introducing impurities to form the source and drain regions of a TFT , a mask is used.
Use the photosensitive resin used as a mask as it is
Then, a silicide layer is formed on the surface of the source and drain portions of the TFT.
Formed, the silicide layer and the source and drain regions
Can be formed without causing a pattern shift.
Highly reliable semiconductors with stable electrical characteristics
There is an effect that a method of manufacturing the device can be obtained.

[0016]

[Brief description of the drawings]

FIG. 1 is a sectional view showing a structure of a contact hole portion of a semiconductor device according to one embodiment of the present invention.

FIG. 2 is a fragmentary cross-sectional view showing a manufacturing step of the semiconductor device shown in FIG. 1;

FIG. 3 is a cross-sectional view illustrating a structure of a contact hole portion of a conventional semiconductor device.

FIG. 4 is a fragmentary cross-sectional view showing a manufacturing step of the semiconductor device shown in FIG. 3;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Interlayer insulating film 3 Gate electrode 4 Gate oxide film 5 Channel polysilicon film 6 Source and drain part 7 Interlayer insulating film 8 Contact hole 9 Wiring layer 10 Silicide layer 11 Resist pattern 12 Refractory metal film

──────────────────────────────────────────────────続 き Continuation of front page (56) References JP-A-63-158875 (JP, A) JP-A-64-50567 (JP, A) JP-A-4-94133 (JP, A) JP-A-4-4-133 247433 (JP, A) JP-A-4-326733 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 29/786 H01L 21/28 301 H01L 21/336

Claims (1)

(57) [Claims] 1. A semiconductor device comprising: a gate electrode provided on a first interlayer insulating film of a semiconductor substrate; and a transistor comprising a semiconductor thin film having a drain and a source region provided on the gate electrode via a gate insulating film. Forming a semiconductor thin film on the gate insulating film and patterning the thin film.
And providing a photosensitive resin on the semiconductor thin film and
After turning, the photosensitive resin is used as a mask to
Performing a semiconductor injection, the semiconductor thin film and the photosensitive resin.
Refractory metal film is deposited on the semiconductor substrate including the entire surface of
After that, dissolving the photosensitive resin and ionizing the semiconductor thin film
The above-mentioned high melting point metal film on the region not implanted is removed.
And the heat treatment, the refractory metal film and the semiconductor
Forming silicide layer by reacting with body thin film
And a method of manufacturing a semiconductor device.