JP2000307060A - Manufacture of resistor element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a method of manufacturing a resistive element which is formed of polycrystalline silicone, processed of an electrode that comes into ohmic contact with a lead-out wiring keeping it stable and high in reproducibility, and regulated in resistance changing from an initial resistance to an optional resistance from the time when the electrode is formed. SOLUTION: A high-melting point metal silicide 28 is deposited on a polycrystalline film 23 for the formation of a resistor 24 of a resistive element, and the high-melting point metal silicide 28 is left unremoved only on the connection ends of the resistive element, by which contact holes are restrained from being excessively dug when the contact holes are board. At the same time, impurity ions are implanted after a process where a high-melting point silicide is left unremoved, by which the resistive element can be regulated in resistance.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a resistance element using polycrystalline silicon.

[0002]

2. Description of the Related Art A conventional method of manufacturing a resistance element using polycrystalline silicon will be described with reference to FIG. 2A to 2C are cross-sectional views illustrating a method of manufacturing a resistance element using polycrystalline silicon in the order of steps.

As shown in FIG. 2A, an oxide film 2 having a thickness of several tens to several hundreds nm is deposited on a semiconductor substrate 1, and a polycrystalline silicon film 3 having a thickness of several hundred nm is formed thereon. Then, impurities such as phosphorus are introduced into the entire surface of the polycrystalline silicon film 3 by ion implantation, patterned by a mask using a photoresist as shown in FIG. 2B, and anisotropic dry etching or the like. A desired resistor 4 is formed. Next, as shown in FIG. 2C, an interlayer oxide film 5 serving as an interlayer insulating film is formed thereon by chemical vapor deposition (Chemical Vapo).
abbreviation for r Deposition, hereinafter referred to as CVD)
The contact 6 is opened in this manner. Aluminum or the like is applied to the semiconductor substrate 1 through the contact 6.
The resistor 4 is attached to the entire surface, and the upper layer wiring 7 made of aluminum or the like is connected by a mask using a photoresist.

[0004]

In the above-described conventional manufacturing method, the interlayer oxide film 5 on the connection portion of the resistor 4 is removed by anisotropic dry etching or the like when the contact 6 is opened. The connection portion of the resistor 4 is dug by over-etching to completely remove the film 5, and an etching reaction product which is difficult to remove even through a cleaning process remains. Thereafter, an aluminum wiring 7 is formed, and the resistor 4 and the aluminum are formed. Even if the heat treatment for the ohmic contact with the wiring 7 is performed, no ohmic contact is formed, resulting in an increase in contact resistance and an increase in contact resistance variation.

According to the present invention, an electrode portion of a resistance element made of polycrystalline silicon can be obtained stably with good reproducibility with respect to an ohmic contact with a wiring for taking out the resistance element. To provide a method of manufacturing a resistance element that can be adjusted by changing from the initial value.

[0006]

According to a method of manufacturing a resistance element of the present invention, a laminated film composed of a silicon film and a first conductive film is sequentially formed on a first insulating film, and the laminated film becomes a resistor. Forming a resistor by removing the laminated film other than the portion to form a resistor, forming a second insulating film on the first insulating film including the resistor so that a region serving as a resistor of the resistor is exposed; Using the second insulating film as a mask, removing the first conductive film and using the remaining first conductive film as an electrode of the resistor, introducing a conductive material into the resistor using the second insulating film as a mask, (2) forming a third insulating film to be an interlayer insulating film on the first insulating film including the resistor by removing the insulating film, and performing a heat treatment for activating the conductor introduced into the resistor; The resistance value of the resistor is adjusted, and a predetermined region of the third insulating film on the electrode of the resistor is adjusted. And a second conductive film is embedded in the resistor contact. Specifically, the silicon film and the first conductive film each include a polysilicon film containing an impurity. And a refractory metal silicide film. Further, the polysilicon film containing the impurities is obtained by introducing and growing an impurity gas during chemical vapor deposition, or the impurity is ion-implanted into a non-doped polysilicon film. It is obtained by doing. Further, as a specific application form, the silicon film and the first conductive film are formed simultaneously with a gate polysilicon film and a gate metal silicide film of a gate electrode of a MOS transistor, respectively. In the above-described manufacturing method, the second insulating film is a resist film, and the conductive material is introduced into the resistor by ion implantation using the resist film as a mask.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First, a first embodiment of the present invention will be described with reference to FIG. 1 (a) to 1 (c)
3A to 3C are cross-sectional views illustrating a method for manufacturing a resistance element using polycrystalline silicon in the order of steps.

As shown in FIG. 1A, an oxide film 2 having a thickness of several tens to several hundreds nm is deposited on a semiconductor substrate 1, and polycrystalline silicon containing impurities such as phosphorus is deposited thereon by a CVD method. A film 23 is formed on the entire surface, and a refractory metal silicide 28 is further deposited on the entire surface by sputtering. After this,
The refractory metal silicide 28 and the polycrystalline silicon film 23 are patterned into a resistor shape by a mask (not shown) using a photoresist, and a resistor 24 is obtained. In this case, the polycrystalline silicon film 23 and the refractory metal silicide 2
Steps from the deposition of the resistor 8 to the formation of the resistor 24 are performed by MO
The deposition may be performed simultaneously with the formation of the gate electrode or the gate wiring from the deposition of the polycrystalline silicon film 23 for the gate electrode or the gate wiring and the refractory metal silicide 28 of the S semiconductor device. Next, as shown in FIG. 1B, a photoresist 30 is formed on the semiconductor substrate 1 including the resistor 24 so that only a resistance region 29 serving as a resistor other than a connection portion of the resistor 24 is exposed. I do. Subsequently, the refractory metal silicide 28 on the resistance region 29 is removed by using anisotropic dry etching or the like, and a resistance electrode 31 is formed. Subsequently, using the photoresist 30 as a mask, ion implantation 32 of an N-type impurity such as phosphorus or a P-type impurity such as boron is performed to adjust the resistance element to a desired resistance value.
Thereafter, as shown in FIG. 1C, an interlayer oxide film 25 serving as an interlayer insulating film is deposited thereon by a CVD method, and a contact 26 is opened in this. Through this contact 26, an upper wiring 27 such as aluminum is connected to the refractory metal silicide at the connection portion of the resistor 24.

When the resistance element is formed as described above, the portion of the resistance element connected to the wiring is covered with a low-resistance high-melting-point metal silicide, and the underlying polycrystalline silicon film is over-etched when the contact is opened. , And there is no etching reaction product that increases the contact resistance unlike the related art, so that the contact resistance itself can be suppressed to a low value. Further, before patterning into a resistor, the resistance value indicated by the polycrystalline silicon film, which is the base material, is ion-implanted into the resistor using a mask at the time of forming the resistor, thereby forming a resistance element. Has the effect of adjusting the resistance value.

[0010]

As described above, in the method of manufacturing a resistance element according to the present invention, a high melting point metal silicide is deposited on a polycrystalline silicon film serving as a resistance element of the resistance element, and a high melting point metal is formed only at a connection portion of the resistance element. By leaving the melting point metal silicide, the contact is not dug at the time of opening the contact as in the related art, and the variation in the contact resistance can be suppressed. Further, since the high melting point metal silicide is formed at the connection portion of the resistance element, the contact resistance itself can be suppressed low. Further, after the step of leaving the high melting point metal silicide at the connection portion of the resistance element, the resistance value of the resistance element can be adjusted by ion-implanting impurities using the mask used in the step.

[Brief description of the drawings]

FIG. 1 is a sectional view illustrating a method of manufacturing a semiconductor device according to a first embodiment of the present invention in the order of steps.

FIG. 2 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device in the order of steps.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Oxide film 3, 23 Polycrystalline silicon film 4, 24 Resistor 5, 25 Interlayer oxide film 6, 26 Contact 7, 27 Upper layer wiring 28 Refractory metal silicide 29 Resistance area 30 Photoresist 31 Resistance electrode 32 Ion implantation

Claims (6)

[Claims] 1. A laminated film comprising a silicon film and a first conductive film is sequentially formed on a first insulating film, and the laminated film other than a portion of the laminated film which becomes a resistor is removed to form a resistor. And
Forming a second insulating film on the first insulating film including the resistor so that a region serving as a resistor of the resistor is exposed, and removing the first conductive film using the second insulating film as a mask; The remaining first conductive film is used as an electrode of the resistor,
A conductive material is introduced into the resistor using the insulating film as a mask, the second insulating film is removed, and a third insulating film serving as an interlayer insulating film is formed on the first insulating film including the resistor. A heat treatment for activating the conductor introduced into the body is performed to adjust a resistance value of the resistor, a predetermined region of the third insulating film on an electrode of the resistor is removed, and a resistor contact is formed. And burying a second conductive film in the resistor contact. 2. The method according to claim 1, wherein the silicon film and the first conductive film are
2. The method for manufacturing a resistance element according to claim 1, wherein the polysilicon film and the refractory metal silicide film each include an impurity. 3. The polysilicon film containing impurities is obtained by introducing and growing an impurity gas during chemical vapor deposition or by ion-implanting impurities into a non-doped polysilicon film. The manufacturing method of the resistance element described in the above. 4. The method according to claim 1, wherein the silicon film and the first conductive film are
4. The method of manufacturing a resistance element according to claim 1, wherein the gate electrode of the MOS transistor is formed simultaneously with the gate polysilicon film and the gate metal silicide film. 5. The method according to claim 1, wherein the second insulating film is a resist film. 6. The method according to claim 1, wherein the conductive material is introduced into the resistor by ion implantation using the resist film as a mask.