JPS6227412B2 - - Google Patents
Info
- Publication number
- JPS6227412B2 JPS6227412B2 JP57065200A JP6520082A JPS6227412B2 JP S6227412 B2 JPS6227412 B2 JP S6227412B2 JP 57065200 A JP57065200 A JP 57065200A JP 6520082 A JP6520082 A JP 6520082A JP S6227412 B2 JPS6227412 B2 JP S6227412B2
- Authority
- JP
- Japan
- Prior art keywords
- operand
- word length
- register
- preshifter
- bits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000000295 complement effect Effects 0.000 claims description 5
- 238000007792 addition Methods 0.000 description 28
- 238000010586 diagram Methods 0.000 description 10
- 238000000034 method Methods 0.000 description 9
- 230000006870 function Effects 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 102100024348 Beta-adducin Human genes 0.000 description 1
- 101000689619 Homo sapiens Beta-adducin Proteins 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000593 degrading effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010365 information processing Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/3001—Arithmetic instructions
- G06F9/30014—Arithmetic instructions with variable precision
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Analysis (AREA)
- Computational Mathematics (AREA)
- Mathematical Optimization (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Computing Systems (AREA)
- Executing Machine-Instructions (AREA)
- Advance Control (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57065200A JPS58182754A (ja) | 1982-04-19 | 1982-04-19 | 演算処理装置 |
US06/484,846 US4677582A (en) | 1982-04-19 | 1983-04-14 | Operation processing apparatus |
GB08310288A GB2120426B (en) | 1982-04-19 | 1983-04-15 | Operation processing apparatus |
DE19833314035 DE3314035A1 (de) | 1982-04-19 | 1983-04-18 | Operationsverarbeitungseinrichtung |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57065200A JPS58182754A (ja) | 1982-04-19 | 1982-04-19 | 演算処理装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS58182754A JPS58182754A (ja) | 1983-10-25 |
JPS6227412B2 true JPS6227412B2 ( ) | 1987-06-15 |
Family
ID=13280029
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57065200A Granted JPS58182754A (ja) | 1982-04-19 | 1982-04-19 | 演算処理装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US4677582A ( ) |
JP (1) | JPS58182754A ( ) |
DE (1) | DE3314035A1 ( ) |
GB (1) | GB2120426B ( ) |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62269228A (ja) * | 1986-05-16 | 1987-11-21 | Matsushita Electric Ind Co Ltd | 算術論理演算ユニツト |
US4809166A (en) * | 1986-08-27 | 1989-02-28 | Advanced Micro Devices, Inc. | Data assembly apparatus and method |
US5307474A (en) * | 1987-09-30 | 1994-04-26 | Mitsubishi Denki Kabushiki Kaisha | Apparatus and method for processing literal operand computer instructions |
GB2215880A (en) * | 1988-03-23 | 1989-09-27 | Benchmark Technologies | Variable length data field processing |
US5101370A (en) * | 1990-07-26 | 1992-03-31 | Unisys Corporation | Programmable digital accumulate and scale circuit |
US5440504A (en) * | 1993-02-19 | 1995-08-08 | Matsushita Electric Industrial Co., Ltd. | Arithmetic apparatus for digital signal processor |
US7395298B2 (en) * | 1995-08-31 | 2008-07-01 | Intel Corporation | Method and apparatus for performing multiply-add operations on packed data |
US6385634B1 (en) | 1995-08-31 | 2002-05-07 | Intel Corporation | Method for performing multiply-add operations on packed data |
US6230257B1 (en) | 1998-03-31 | 2001-05-08 | Intel Corporation | Method and apparatus for staggering execution of a single packed data instruction using the same circuit |
US6230253B1 (en) * | 1998-03-31 | 2001-05-08 | Intel Corporation | Executing partial-width packed data instructions |
US7430578B2 (en) * | 2001-10-29 | 2008-09-30 | Intel Corporation | Method and apparatus for performing multiply-add operations on packed byte data |
KR20070088190A (ko) * | 2006-02-24 | 2007-08-29 | 삼성전자주식회사 | 멀티미디어 데이터 처리를 위한 서브워드 병렬 처리 방법 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54159831A (en) * | 1978-06-07 | 1979-12-18 | Fujitsu Ltd | Adder and subtractor for numbers different in data length using counter circuit |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1245441A (en) * | 1968-08-27 | 1971-09-08 | Int Computers Ltd | Improvements in or relating to adders operating on variable fields within words |
US4109310A (en) * | 1973-08-06 | 1978-08-22 | Xerox Corporation | Variable field length addressing system having data byte interchange |
US3935572A (en) * | 1973-11-23 | 1976-01-27 | Hughes Aircraft Company | System for resolving velocity ambiguity in pulse-doppler radar |
US4021655A (en) * | 1976-03-30 | 1977-05-03 | International Business Machines Corporation | Oversized data detection hardware for data processors which store data at variable length destinations |
US4135242A (en) * | 1977-11-07 | 1979-01-16 | Ncr Corporation | Method and processor having bit-addressable scratch pad memory |
DE2806452C3 (de) * | 1978-02-15 | 1981-11-12 | Ščetinin, Jurij Ivanovič | Anordnung zur Verarbeitung von Mehrbytefeldern mit Daten veränderlicher Länge |
US4296469A (en) * | 1978-11-17 | 1981-10-20 | Motorola, Inc. | Execution unit for data processor using segmented bus structure |
US4434459A (en) * | 1980-04-25 | 1984-02-28 | Data General Corporation | Data processing system having instruction responsive apparatus for both a basic and an extended instruction set |
US4491910A (en) * | 1982-02-22 | 1985-01-01 | Texas Instruments Incorporated | Microcomputer having data shift within memory |
US4507731A (en) * | 1982-11-01 | 1985-03-26 | Raytheon Company | Bidirectional data byte aligner |
-
1982
- 1982-04-19 JP JP57065200A patent/JPS58182754A/ja active Granted
-
1983
- 1983-04-14 US US06/484,846 patent/US4677582A/en not_active Expired - Lifetime
- 1983-04-15 GB GB08310288A patent/GB2120426B/en not_active Expired
- 1983-04-18 DE DE19833314035 patent/DE3314035A1/de active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54159831A (en) * | 1978-06-07 | 1979-12-18 | Fujitsu Ltd | Adder and subtractor for numbers different in data length using counter circuit |
Also Published As
Publication number | Publication date |
---|---|
US4677582A (en) | 1987-06-30 |
GB2120426B (en) | 1986-06-18 |
GB2120426A (en) | 1983-11-30 |
GB8310288D0 (en) | 1983-05-18 |
DE3314035C2 ( ) | 1987-06-19 |
DE3314035A1 (de) | 1983-10-27 |
JPS58182754A (ja) | 1983-10-25 |
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