JPS6225798Y2 - - Google Patents

Info

Publication number
JPS6225798Y2
JPS6225798Y2 JP13541681U JP13541681U JPS6225798Y2 JP S6225798 Y2 JPS6225798 Y2 JP S6225798Y2 JP 13541681 U JP13541681 U JP 13541681U JP 13541681 U JP13541681 U JP 13541681U JP S6225798 Y2 JPS6225798 Y2 JP S6225798Y2
Authority
JP
Japan
Prior art keywords
data
frame
flag
address
timer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP13541681U
Other languages
English (en)
Japanese (ja)
Other versions
JPS5839642U (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13541681U priority Critical patent/JPS5839642U/ja
Publication of JPS5839642U publication Critical patent/JPS5839642U/ja
Application granted granted Critical
Publication of JPS6225798Y2 publication Critical patent/JPS6225798Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Bus Control (AREA)
  • Computer And Data Communications (AREA)
JP13541681U 1981-09-09 1981-09-09 ダイレクトメモリアクセス制御装置 Granted JPS5839642U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13541681U JPS5839642U (ja) 1981-09-09 1981-09-09 ダイレクトメモリアクセス制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13541681U JPS5839642U (ja) 1981-09-09 1981-09-09 ダイレクトメモリアクセス制御装置

Publications (2)

Publication Number Publication Date
JPS5839642U JPS5839642U (ja) 1983-03-15
JPS6225798Y2 true JPS6225798Y2 (US20080094685A1-20080424-C00004.png) 1987-07-01

Family

ID=29928785

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13541681U Granted JPS5839642U (ja) 1981-09-09 1981-09-09 ダイレクトメモリアクセス制御装置

Country Status (1)

Country Link
JP (1) JPS5839642U (US20080094685A1-20080424-C00004.png)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62184830U (US20080094685A1-20080424-C00004.png) * 1986-05-14 1987-11-24

Also Published As

Publication number Publication date
JPS5839642U (ja) 1983-03-15

Similar Documents

Publication Publication Date Title
KR950008226B1 (ko) 버스트 전송 모드를 갖는 버스 마스터
JPS5942397B2 (ja) メモリ・システム
JPS6219011Y2 (US20080094685A1-20080424-C00004.png)
JPS6225798Y2 (US20080094685A1-20080424-C00004.png)
US20010033524A1 (en) Circuit for managing the transfer of data streams from a plurality of sources within a system
JP2624388B2 (ja) Dma装置
JP2617575B2 (ja) データ速度変換回路
SU1397915A1 (ru) Имитатор внешнего устройства
SU1594536A1 (ru) Устройство дл прерывани программ
JPS63288351A (ja) メモリ・ブロックの書き込み、読み出し回路
SU1667087A1 (ru) Устройство дл управлени обменом процессора с пам тью
SU525076A1 (ru) Блок выборки команды
JP2948244B2 (ja) バス制御方式
JP2510268B2 (ja) デ―タ保持回路
SU1524056A1 (ru) Устройство дл адресации к пам ти
JP2526042Y2 (ja) メモリ・レジスタ制御回路
JPH0447855B2 (US20080094685A1-20080424-C00004.png)
SU1608752A1 (ru) Устройство дл регенерации динамической пам ти
JPS6278933A (ja) 高速伝送用ラインモニタ装置
JPS6155137B2 (US20080094685A1-20080424-C00004.png)
JPH0430775B2 (US20080094685A1-20080424-C00004.png)
JPS58184188A (ja) デイスプレイデ−タの読み出し・書き込み方式
JPH0317756A (ja) 記憶装置のアクセス方式
JPH0216829A (ja) データ受信制御方式
JPH02127891A (ja) デジタル回線使用中制御回路