JPS62241043A - History information collecting device - Google Patents

Abstract

PURPOSE:To perform the instruction of the detailed trace conditions by providing a trace condition register and a trace counter register, etc., and controlling the trace conditions of the data stored in a history information collecting device based on two conditions, i.e., the internal state and the fixed time. CONSTITUTION:The replacement of a trace address register 13 is carried out in accordance with the contents of a trace condition register 15 which instructs the trace conditions based on the internal state of the register 13 and via a trace counter 16, etc. In other words, the register 13 is replaced at a time point when the coincidence is obtained between the contents of the register 15 and those of a trace buffer register 12 and also when the output signal of the register 16 is not equal to 'all-0'. Then the register 16 undergoes decrement through a decrement circuit 17 until the value of the register 16 is equal to 0. This decrement action is started at a time point when a coincidence detector 18 detects the coincident. Then an increment instruction is given to an incrementer 14 within a period during which an address register advancing circuit 19 detects the coincidence and then 'all-0' is detected. Thus the detailed trace conditions can be instructed by controlling the trace conditions under two conditions, i.e., the internal state of the register and the fixed time.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a history information collection device, and particularly to history information collection for tracing the internal state of an information processing device.

[Conventional technology]

Conventionally, in the tracer memory of an information processing device, the conditions for tracing internal information can be one type (for example, every clock) or multiple conditions can be selected and specified in advance (for example, every tarok, every fixed time). Become a friend.

[Problem that the invention seeks to solve]

Regarding tracing of the internal information of the above-mentioned information processing device, there are various requirements depending on the case in which tracing is performed, and the conditions thereof are becoming increasingly complex. especially,
When you want to focus on a specific internal state of a device and obtain information in the temporal vicinity, and when this state occurs repeatedly and at intervals, a normal trace device requires a long trace span. This has the disadvantage that the trace unit time becomes too long and detailed information cannot be obtained.

[Defined means of solving problems]

The history information collecting device of the present invention includes a trace memory that holds internal state information for collecting history information of internal states in an information processing system, and a trace memory that temporarily stores internal information of the device to be written to the trace memory. a trace buffer register for holding, a trace address register for holding a write address of the trace memory, and an incrementer for incrementing the contents of the trace address register.

A trace condition register that specifies trace conditions according to the internal state, a trace count register that specifies the number of clocks for each trace, and a decrementer that detects -1L and -0'' based on the contents of the trace count register. , a match detector between the trace condition register and the internal state, and output signals of the match detector and decrementer are set to L.
The circuit also includes a circuit for controlling the increment of the trace address register.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. In FIG. 1, the present embodiment includes a trace memory 11, a trace buffer register 12 connected to the trace memory 11, a trace address register 13, an incrementer 14 connected to the trace address register, and a trace buffer register 12 connected to the trace memory 11. a condition register 15, a trace count register 16,
a decrementer 17 connected to the trace counter register 16; a coincidence detector 18 connected to the race buffer register 12 and the trace condition register 15; and an address register increment circuit 19 connected to the decrementer 17 and the coincidence detector 18. including.

FIG. 2 shows the state when tracing is being performed in this embodiment.To explain the entire operation of this embodiment with reference to 2@7, when the device is operating, the trace buffer register 12 receives The internal state of the device thus determined is sequentially written to the trace memory, and the information is accumulated. The address of the trace memory 11 is specified to the trace address register 13, but the trace address register 1
By performing the control described in step 3, if tracing is not performed, tracing is performed without updating the address, thereby eliminating unnecessary traces.

The step condition for the trace address register in this embodiment is when the contents of the trace condition register 15 and the contents of the trace buffer register 12 match, and when the output signal of the trace count register is not all O, the trace address register The trace count register 16, which is updated with 13, is decremented by the decrement circuit 17 until it becomes 0, and 0 is detected.

The decrement starts at a fixed time when the coincidence detector 18 detects a coincidence. The address register increment circuit 19 instructs the incrementer 14 to increment from the time when a match is detected in the output of the match detector 18 until the time when O//, 0 is detected in the output of the decrementer 17. conduct.

In order to do this, this embodiment holds a trace condition register that performs t tracing according to the internal state of the trace memory, and also maintains a trace condition register that performs a trace for a specified time from the specified time point when the trace condition occurs. Providing the register makes it possible to trace time as shown in FIG.

〔Effect of the invention〕

As explained above, the present invention is effective in that it is possible to control the trace conditions of data within the device using two conditions: the internal state and a fixed time, and to specify fine-grained trace conditions. .

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a diagram showing a trace state in one embodiment of the present invention. 11...Trace memory, 12...Trace buffer register, 13...Trace address register, 14...Incrementer, 1
5...Trace condition register, 16...
・Trace count register P, 17... Decrementer, 18... Match detector, 19...
・Address register step circuit. Nootsu F race counter Shinzuta Figure 1

Claims (1)

[Claims] a trace memory that holds internal state information for collecting history information of internal states in the information processing system; a trace buffer register that temporarily holds internal information of the device for writing to the trace memory; A trace address register that holds the write address of the trace memory, an incrementer that increments the contents of the trace address register, a trace condition register that specifies trace conditions according to the internal state, and specifies the number of clocks for each trace. Receive the trace count register and the contents of the trace count register, -1, and “
0'' detection, a coincidence detector between the trace condition register and an internal state, and a circuit that controls increment of the trace address register by output signals of the coincidence detector and the decrementer. historical information collection device.