JPS6292038A - Control system for record of history memory - Google Patents

Abstract

PURPOSE:To record effective record information with a history memory comparatively small in capacity by recording the contents of a designated register only when they may possibly be renewed. CONSTITUTION:The contents of an instruction code register 2 are decoded by a decoder 3 and a signal showing a desired instruction is supplied to a record control circuit 4. Then a command is issued from the circuit 4 to record to a history memory 6 via a record command signal line 10. The contents to be recorded are selected by a multiplexer 5 according to the register number set to a number register 1. While the contents of a selected register 11 are sent to the memory 6. In such a constitution, the output of the decoder 3 that is supplied to the circuit 4 is selected properly. Thus the contents of the designated register are stored only an instruction having the sufficient possibility for replacement of the register 11 is executed. Thus it is possible to record the effective record information with a history memory of a comparatively small capacity.

Description

[Detailed Description of the Invention] [(Already required)] A control method for recording a history memory that records the contents of necessary registers of a processing device during program execution as data for debugging programs in a computer system. Necessary registers When the code of a specific instruction, such as a load instruction, is detected, the contents of the specified register are recorded.This configuration allows effective information to be stored in the small history memory. By adding a simple circuit, it is possible to record data without any need for recording.

[Industrial application field]

The present invention relates to a history memory recording control method for recording the contents of required registers of a processing device during program execution as data for program debugging and the like in a computer system.

Records in the history memory are records of the history of the contents of various registers in the processing device, and are used as effective information during program execution.

However, if necessary information is to be recorded without being omitted, the history memory tends to require a large storage capacity.

(Prior Art and Problems to be Solved by the Invention) Conventional history memory recording methods include, for example, a method of recording the contents of required registers at fixed time intervals.

In this method, recording is performed even when there is no change in the contents of the register, so increasing the recording frequency increases the required storage capacity of the history memory.

Furthermore, if the recording interval is widened, there is a problem that frequent changes cannot be detected.

For this purpose, recording is performed only when there is a change in the contents of a required register, but this requires a relatively complex circuit, effectively reduces the required capacity of the history memory, and records effective information. There was no simple method that would prevent leaks.

[Means for solving problems]

The figure is a block diagram showing the configuration of the present invention.

In the figure, 1 is a number register that holds register number specification information, 2 is an instruction code register, 3 is a decoder,
4 is a recording control circuit, 5 is a multiplexer, 6 is a history memory, and 10 is a recording command signal line.

[Operation] The contents of the instruction code register 2 are decoded by the decoder 3, and a signal indicating the required instruction is input to the recording control circuit 4, from which recording is performed in the history memory 6 via the recording command signal line 10. commanded.

The contents to be recorded are selected by the multiplexer 5 according to the register number set in the number register 1, and the contents of the selected l register among the registers 11 are sent to the history memory 6.

With the above configuration, by appropriately selecting the output of the decoder 3 that is input to the recording control circuit 4, the contents of the specified register can be stored only when an instruction that has a high possibility of updating the register 11 is executed. Valid recording information is possible with a relatively small amount of history memory.

Further, since the decoder 3 can also serve as a decoder function necessary for controlling instruction execution, the above function can be achieved with only a relatively small amount of additional circuitry.

(Embodiment) The instruction code register 2 and decoder 3 shown in the figure may also serve as a register and a decoder for holding the instruction code part of the instruction retrieved from the main storage device etc. for instruction execution control.

The number register 1 is set in advance with the number of the register that requires recording.

The contents of the instruction code register 2 are decoded by a decoder 3, and only a signal indicating a required instruction such as a load instruction is input to the recording control circuit 4.

The recording control circuit 4 generates a recording command signal at the time of a predetermined command by, for example, the logical sum of these input signals, and instructs the history memory 6 to record through the recording command signal line 10.

The content to be recorded is set in number register 1.
Since the 5 star number is selected by the multiplexer 5, the contents of the selected 1 register of the registers 11 are transferred to the history memory 6.

With the above configuration, the contents of a designated register are recorded only when there is a possibility of updating, and valid recording information can be recorded using a relatively small-capacity history memory.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, it is possible to record valid information using a relatively small-capacity history memory in a processing device of a computer system by adding a small amount of circuitry. This has a significant industrial effect.

[Brief explanation of drawings]

The figure is a block diagram showing the configuration of an embodiment of the present invention. In the figure, 1 is the number register, 2 is the instruction code register, and 3 is the number register.
4 is a decoder, 4 is a recording control circuit, 5 is a multiplexer, 6 is a history memory, 10 is a recording command signal line, and 11 is a register.

Claims (1)

[Claims] Means (1) for holding register number designation information when recording contents held in a register (11) of a processing device of a computer system in a history memory (6);
It has detection means (2, 3, 4) for a required instruction code, and records the contents of the register with the specified number in the history memory by a signal (10) indicating that the detection means detects the required instruction code. A history memory recording control method characterized by: