JPS61131126A - Information processing unit - Google Patents

Abstract

PURPOSE:To set plural intermission points by dividing equally an area of a control storage device, providing a brake address register corresponding to each area and intermitting the operation depending on the coincidence between the content of the register and that of an address register. CONSTITUTION:In the operation intermitting a microprogram, four addresses are prepared and they constitute a brake address register group (BAR) 3. The four address correspond respectively to areas being four equal division of the control storage device 1. Since the area of the control storage device 1 is decided by a high-order 2-bit of the address of the register 2, the selector 4 is switched by the high-order 2-bit and the content of the BAR 3 corresponding to the area is inputted to a comparator 5. The comparator 5 compares the content with the content of the register 2, and when they are coincident, the brake point signal is true to intermit the operation of the microprogram.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an information processing device using a microprogram control method.

[Technical background of the invention]

In conventional microprogram control type information processing devices, if you want to interrupt the operation of a microprogram in the middle of its execution, you can either stop the microprogram by a microprogram address match, or write the microprogram to a rewritable control memory (WO2). In the previous version, the program was interrupted by rewriting one step of the program to be interrupted into an unconditional branch microinstruction.

[Problems with background technology]

The disadvantage of the microprogram address match method is that it is only possible to interrupt one address, and the method of rewriting the microinstruction has the disadvantage that the program cannot be restarted correctly the next time because the contents of the program have changed. was there.

[Purpose of the invention]

The present invention overcomes the drawbacks of the prior art and allows a microprogram to be interrupted without affecting the operating sequence of the microprogram. The purpose is to allow multiple points to be set.

[Summary of the invention]

The present invention divides the storage area of the control memory where the microprogram is stored into equal parts, and provides a break address register corresponding to each area to store an address for interrupting the operation, and reads the contents of this register and the microprogram. This purpose is achieved by interrupting the microprogram operation upon a match with the contents of the output address register.

[Embodiments of the invention]

FIG. 1 is a block diagram showing one embodiment of the present invention.
1) is a control memory in which microprograms are stored;
(2) is the address register of this control memory (1), (3
) is a group of registers (hereinafter referred to as break address registers or BAR) that stores the address at which to interrupt the microprogram.
), (4) is a selector for selecting one of this BAR group (3), and (5) is a comparator between the output of this selector (4) and the address register of the control memory (1). be. Further, (6) is a signal that becomes true when this comparator matches, and is a signal that becomes a breakpoint signal for the microprogram.

Next, the operation shown in FIG. 1 will be explained. First, in the case of normal operation, the control memory (1) where the microprogram is stored
The microprogram is read out and executed according to the address register (2). Reading of the microprogram is then executed depending on whether the address register (2) is counted up or whether a branch destination address is stored in the address register (2) by a branch microinstruction.

In the operation that interrupts the microprogram, the address is the first
In the example shown, four are prepared, and these constitute the BAR group (3). However, these four addresses are control memory
1 corresponds to each area obtained by equally dividing 1 (1) into four areas. The upper 2 bits of the address of the address register (2) determine the area of this control memory (1), so the selector (4) is switched by these upper 2 bits and the 1 of BAR (3) corresponding to that area is selected. The contents of one are input to the comparator (5). Since the contents of the address register (2) are further input to the comparator (5), these two types of signals are compared. When these two types of signals match, the breakpoint signal becomes true and the operation of the microprogram is interrupted.

There are various types of interruption processing, but for example, the clock is stopped by a breakpoint signal (6).

After the service processor or the like reads the internal registers and completes the processing, the service processor may remove the breakpoint signal and resume the original processing.

〔Effect of the invention〕

The present invention is as described above, and it is possible to set a plurality of points at which the operation of the microprogram is interrupted. Further, after interrupting the operation, it is possible to restart the processing without disturbing the operation sequence of the microprogram.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention. Control memory, 2 near address registers, 3 near address register group, 4: selector, 5: comparator, 6: breakpoint signal.

Claims (1)

[Claims] An information processing device using a microprogram control method,
A plurality of break address registers each corresponding to an equally divided area of the control memory where the microprogram is stored and storing an address for interrupting operation, and a register for selecting one of the plurality of break address registers. A selector, a comparator that compares the selected address with the contents of the address register from which the microprogram is read, and if a match is found in this comparator, the operation of the microprogram is interrupted and other processing is performed. An information processing device comprising means for restarting the original processing of a microprogram.