JPS622259U - - Google Patents
Info
- Publication number
- JPS622259U JPS622259U JP9312485U JP9312485U JPS622259U JP S622259 U JPS622259 U JP S622259U JP 9312485 U JP9312485 U JP 9312485U JP 9312485 U JP9312485 U JP 9312485U JP S622259 U JPS622259 U JP S622259U
- Authority
- JP
- Japan
- Prior art keywords
- conductive pad
- clip
- substrate
- external terminal
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 5
- 239000000843 powder Substances 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 3
- 239000004593 Epoxy Substances 0.000 claims description 2
- 230000002093 peripheral effect Effects 0.000 claims 1
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図は本考案による実施例を示す断面図、第
２図は従来例を示す断面図である。
１……金属基板、２……導電パツド、３……ク
リツプ、４……リード、５……外部端子、６……
エポキシ粉末、７……導電路。
FIG. 1 is a sectional view showing an embodiment of the present invention, and FIG. 2 is a sectional view showing a conventional example. 1... Metal substrate, 2... Conductive pad, 3... Clip, 4... Lead, 5... External terminal, 6...
Epoxy powder, 7... conductive path.
Claims (1)
に設けられた導電パツドと、該導電パツドに接続
されるクリツプと該クリツプの底部から突出され
るリードから成る外部端子とを具備し、前記導電
パツドが設けられる基板の側面に絶縁粉末を付着
させ、前記外部端子のクリツプを基板側面と離間
させることを特徴とする混成集積回路。 ２ 特許請求の範囲第１項に於いて前記絶縁粉末
としてエポキシ粉末を用いることを特徴とした混
成集積回路。[Claims for Utility Model Registration] 1. An external terminal consisting of a metal substrate, a conductive pad provided on at least one peripheral edge of the metal substrate, a clip connected to the conductive pad, and a lead protruding from the bottom of the clip. A hybrid integrated circuit comprising: an insulating powder is attached to a side surface of a substrate on which the conductive pad is provided, and a clip of the external terminal is separated from the side surface of the substrate. 2. A hybrid integrated circuit according to claim 1, characterized in that epoxy powder is used as the insulating powder.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9312485U JPS622259U (en) | 1985-06-20 | 1985-06-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9312485U JPS622259U (en) | 1985-06-20 | 1985-06-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS622259U true JPS622259U (en) | 1987-01-08 |
Family
ID=30650519
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9312485U Pending JPS622259U (en) | 1985-06-20 | 1985-06-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS622259U (en) |
-
1985
- 1985-06-20 JP JP9312485U patent/JPS622259U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS622259U (en) | ||
| JPH0363217U (en) | ||
| JPH02114943U (en) | ||
| JPS622260U (en) | ||
| JPS6315033U (en) | ||
| JPS5863703U (en) | chip resistor | |
| JPS61149334U (en) | ||
| JPS6226050U (en) | ||
| JPS61156265U (en) | ||
| JPS61173143U (en) | ||
| JPS61146977U (en) | ||
| JPS6186969U (en) | ||
| JPS6457669U (en) | ||
| JPS6186968U (en) | ||
| JPS6413137U (en) | ||
| JPS6327096U (en) | ||
| JPS60167347U (en) | semiconductor equipment | |
| JPS62167394U (en) | ||
| JPS59104540U (en) | Ceramic chip carrier | |
| JPS6190185U (en) | ||
| JPS61122580U (en) | ||
| JPS61201349U (en) | ||
| JPS6194375U (en) | ||
| JPS61195053U (en) | ||
| JPS61151337U (en) |