JPS61173143U - - Google Patents

Info

Publication number
JPS61173143U
JPS61173143U JP5646285U JP5646285U JPS61173143U JP S61173143 U JPS61173143 U JP S61173143U JP 5646285 U JP5646285 U JP 5646285U JP 5646285 U JP5646285 U JP 5646285U JP S61173143 U JPS61173143 U JP S61173143U
Authority
JP
Japan
Prior art keywords
back surface
semiconductor device
same level
sip type
tips
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5646285U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5646285U priority Critical patent/JPS61173143U/ja
Publication of JPS61173143U publication Critical patent/JPS61173143U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図aは本考案の一実施例に係るSIP型I
Cの平面図、同図bは同図aの側面図、第2図a
は従来のSIP型ICの平面図、同図bは同図a
の側面図、第3図aは従来のSIP型ICの平面
図、同図bは同図aの側面図、第4図は第1図の
SIP型ICを絶縁性基板に実装した状態を示す
説明図である。 11……IC本体、12……リード端子、13
……下面、14……裏面、15……SIP型IC
、16……絶縁性基板。
FIG. 1a shows a SIP type I according to an embodiment of the present invention.
A plan view of C, Figure b is a side view of Figure A, Figure 2 a.
is a plan view of a conventional SIP type IC, and figure b is a plan view of a conventional SIP type IC.
Figure 3a is a plan view of a conventional SIP type IC, Figure b is a side view of Figure a, and Figure 4 shows the SIP type IC of Figure 1 mounted on an insulating substrate. It is an explanatory diagram. 11...IC body, 12...Lead terminal, 13
... Bottom surface, 14 ... Back surface, 15 ... SIP type IC
, 16... Insulating substrate.

Claims (1)

【実用新案登録請求の範囲】 (1) SIP型のIC本体と、このIC本体の側
壁に設けられ、先端部がIC本体の裏面に対し同
一レベル以下となるように屈曲した複数のリード
端子とを具備することを特徴とする半導体装置。 (2) リード端子の先端部がIC本体の裏面と同
一レベルであることを特徴とする実用新案登録請
求の範囲第1項記載の半導体装置。
[Scope of Claim for Utility Model Registration] (1) A SIP type IC body, and a plurality of lead terminals provided on the side wall of the IC body and bent so that their tips are at or below the same level as the back surface of the IC body. A semiconductor device comprising: (2) The semiconductor device according to claim 1, wherein the tip of the lead terminal is at the same level as the back surface of the IC body.
JP5646285U 1985-04-16 1985-04-16 Pending JPS61173143U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5646285U JPS61173143U (en) 1985-04-16 1985-04-16

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5646285U JPS61173143U (en) 1985-04-16 1985-04-16

Publications (1)

Publication Number Publication Date
JPS61173143U true JPS61173143U (en) 1986-10-28

Family

ID=30580076

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5646285U Pending JPS61173143U (en) 1985-04-16 1985-04-16

Country Status (1)

Country Link
JP (1) JPS61173143U (en)

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