JPS62183487A - ラスタ走査ビデオ制御装置 - Google Patents

ラスタ走査ビデオ制御装置

Info

Publication number
JPS62183487A
JPS62183487A JP61315915A JP31591586A JPS62183487A JP S62183487 A JPS62183487 A JP S62183487A JP 61315915 A JP61315915 A JP 61315915A JP 31591586 A JP31591586 A JP 31591586A JP S62183487 A JPS62183487 A JP S62183487A
Authority
JP
Japan
Prior art keywords
data
memory
update
registered
transceivers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61315915A
Other languages
English (en)
Japanese (ja)
Inventor
クレイグ オルデン マッケナー
ジャン クウェイ ジャック リ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of JPS62183487A publication Critical patent/JPS62183487A/ja
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/393Arrangements for updating the contents of the bit-mapped memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Digital Computer Display Output (AREA)
JP61315915A 1985-12-30 1986-12-27 ラスタ走査ビデオ制御装置 Pending JPS62183487A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US81536185A 1985-12-30 1985-12-30
US815361 1985-12-30

Publications (1)

Publication Number Publication Date
JPS62183487A true JPS62183487A (ja) 1987-08-11

Family

ID=25217562

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61315915A Pending JPS62183487A (ja) 1985-12-30 1986-12-27 ラスタ走査ビデオ制御装置

Country Status (2)

Country Link
EP (1) EP0228745A3 (fr)
JP (1) JPS62183487A (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007124200A (ja) * 2005-10-27 2007-05-17 Nittan Co Ltd 圧電振動板の取付構造

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5185856A (en) * 1990-03-16 1993-02-09 Hewlett-Packard Company Arithmetic and logic processing unit for computer graphics system
US5579473A (en) * 1994-07-18 1996-11-26 Sun Microsystems, Inc. Interface controller for frame buffer random access memory devices
JP2001505674A (ja) * 1997-03-25 2001-04-24 セイコーエプソン株式会社 Vgaと整合性を有するビデオ表示アダプタを用いて効率的なメモリ読み出し動作を行なうための方法及び装置
JP3342352B2 (ja) 1997-07-04 2002-11-05 シャープ株式会社 表示用メモリ制御装置
US6311239B1 (en) * 1998-10-29 2001-10-30 Cypress Semiconductor Corp. Architecture, circuitry and method for transmitting n-bit wide data over m-bit wide media

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4317168A (en) * 1979-11-23 1982-02-23 International Business Machines Corporation Cache organization enabling concurrent line castout and line fetch transfers with main storage
JPS60117327A (ja) * 1983-11-30 1985-06-24 Fuji Xerox Co Ltd ディスプレイ装置
JPS60147785A (ja) * 1984-01-12 1985-08-03 株式会社アスキ− 論理領域間デ−タ移動制御装置
US4648045A (en) * 1984-05-23 1987-03-03 The Board Of Trustees Of The Leland Standford Jr. University High speed memory and processor system for raster display

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007124200A (ja) * 2005-10-27 2007-05-17 Nittan Co Ltd 圧電振動板の取付構造

Also Published As

Publication number Publication date
EP0228745A3 (fr) 1990-03-28
EP0228745A2 (fr) 1987-07-15

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