JPS62158820U - - Google Patents

Info

Publication number
JPS62158820U
JPS62158820U JP4704186U JP4704186U JPS62158820U JP S62158820 U JPS62158820 U JP S62158820U JP 4704186 U JP4704186 U JP 4704186U JP 4704186 U JP4704186 U JP 4704186U JP S62158820 U JPS62158820 U JP S62158820U
Authority
JP
Japan
Prior art keywords
semiconductor ceramic
ceramic substrate
substrate
electrode formed
line electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4704186U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4704186U priority Critical patent/JPS62158820U/ja
Publication of JPS62158820U publication Critical patent/JPS62158820U/ja
Pending legal-status Critical Current

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Landscapes

  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Filters And Equalizers (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、この考案の一実施例に係るフイルタ
素子を示す斜視図である。第2図は、第1図の線
―に沿う拡大断面図である。第3図は、第1
図のフイルタ素子の等価回路図である。第4図お
よび第5図は、それぞれフイルタ回路の他の例を
示す回路図である。 2……半導体セラミツク基板、4……ライン電
極、6a,6b……コンデンサ電極、8……フエ
ライト板、10a〜10c……引出し端子。
FIG. 1 is a perspective view showing a filter element according to an embodiment of this invention. FIG. 2 is an enlarged sectional view taken along the line - in FIG. 1. Figure 3 shows the first
FIG. 3 is an equivalent circuit diagram of the filter element shown in the figure. FIGS. 4 and 5 are circuit diagrams showing other examples of filter circuits, respectively. 2...Semiconductor ceramic substrate, 4...Line electrode, 6a, 6b...Capacitor electrode, 8...Ferrite plate, 10a to 10c...Outgoing terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体セラミツク基板と、当該半導体セラミツ
ク基板の表面に形成されていて当該基板とオーミ
ツク性接触をしているライン電極と、前記半導体
セラミツク基板の表面に当該基板の酸化膜を挾ん
で形成されたコンデンサ電極と、前記半導体セラ
ミツク基板上に前記ライン電極と交差するように
設けられたフエライトとを備えることを特徴とす
るフイルタ素子。
A semiconductor ceramic substrate, a line electrode formed on the surface of the semiconductor ceramic substrate and in ohmic contact with the substrate, and a capacitor electrode formed on the surface of the semiconductor ceramic substrate with an oxide film of the substrate interposed therebetween. and a ferrite provided on the semiconductor ceramic substrate so as to intersect with the line electrode.
JP4704186U 1986-03-29 1986-03-29 Pending JPS62158820U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4704186U JPS62158820U (en) 1986-03-29 1986-03-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4704186U JPS62158820U (en) 1986-03-29 1986-03-29

Publications (1)

Publication Number Publication Date
JPS62158820U true JPS62158820U (en) 1987-10-08

Family

ID=30867266

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4704186U Pending JPS62158820U (en) 1986-03-29 1986-03-29

Country Status (1)

Country Link
JP (1) JPS62158820U (en)

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