JPS62149242A - ビツトバツフア回路 - Google Patents

ビツトバツフア回路

Info

Publication number
JPS62149242A
JPS62149242A JP60289309A JP28930985A JPS62149242A JP S62149242 A JPS62149242 A JP S62149242A JP 60289309 A JP60289309 A JP 60289309A JP 28930985 A JP28930985 A JP 28930985A JP S62149242 A JPS62149242 A JP S62149242A
Authority
JP
Japan
Prior art keywords
clock
circuit
data
write
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60289309A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0564901B2 (enrdf_load_html_response
Inventor
Yukio Hagiwara
萩原　幸雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP60289309A priority Critical patent/JPS62149242A/ja
Publication of JPS62149242A publication Critical patent/JPS62149242A/ja
Publication of JPH0564901B2 publication Critical patent/JPH0564901B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP60289309A 1985-12-24 1985-12-24 ビツトバツフア回路 Granted JPS62149242A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60289309A JPS62149242A (ja) 1985-12-24 1985-12-24 ビツトバツフア回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60289309A JPS62149242A (ja) 1985-12-24 1985-12-24 ビツトバツフア回路

Publications (2)

Publication Number Publication Date
JPS62149242A true JPS62149242A (ja) 1987-07-03
JPH0564901B2 JPH0564901B2 (enrdf_load_html_response) 1993-09-16

Family

ID=17741513

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60289309A Granted JPS62149242A (ja) 1985-12-24 1985-12-24 ビツトバツフア回路

Country Status (1)

Country Link
JP (1) JPS62149242A (enrdf_load_html_response)

Also Published As

Publication number Publication date
JPH0564901B2 (enrdf_load_html_response) 1993-09-16

Similar Documents

Publication Publication Date Title
JP4219949B2 (ja) 同期メモリ装置
KR100207880B1 (ko) 셀프-타임 통신 인터페이스와 디지탈 데이타 전송 방법
US6163545A (en) System and method for data transfer across multiple clock domains
JPS62149242A (ja) ビツトバツフア回路
KR20030013673A (ko) 데이터 전송 속도 변환 장치
JPH03171945A (ja) ディジタルシステム
JPH0653955A (ja) パラレルビット同期方式
KR0175605B1 (ko) 에이.티.엠.에서 유토피아 동기소자와 논-유토피아 비동기소자의 접속 제어 로직
KR100222041B1 (ko) 신호 처리 장치
US20030002589A1 (en) Serial communication circuit and serial transmitting and receiving system
JP3484660B2 (ja) バッファメモリ容量不足検出回路
JP2617575B2 (ja) データ速度変換回路
JP3070546B2 (ja) 警報転送回路
JP2722903B2 (ja) 同期網無線電送システム
JP3246096B2 (ja) ディジタル機器の自己診断装置
KR930007593Y1 (ko) 장치간 데이타 입출력 인터페이스 회로
JPH0458631A (ja) フレーム位相合わせ方式
KR880001024B1 (ko) 데이터 전송방법
JPS6253530A (ja) Ｔｄｍａ通信装置の制御用情報発生回路
KR880001023B1 (ko) 셀프콜록킹 데이타 전송시스템
JPS59221045A (ja) デ−タ送受信タイミング制御方式
JPH08237235A (ja) ディジタル通信システム
JPH01204169A (ja) バス転送制御方式
JPH0322113B2 (enrdf_load_html_response)
JPH05207045A (ja) ループ型伝送路における遅延時間差補正方式