JPS6212598B2 - - Google Patents
Info
- Publication number
- JPS6212598B2 JPS6212598B2 JP55147926A JP14792680A JPS6212598B2 JP S6212598 B2 JPS6212598 B2 JP S6212598B2 JP 55147926 A JP55147926 A JP 55147926A JP 14792680 A JP14792680 A JP 14792680A JP S6212598 B2 JPS6212598 B2 JP S6212598B2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- terminal
- threshold voltage
- potential
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4094—Bit-line management or control circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dc-Dc Converters (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55147926A JPS5771581A (en) | 1980-10-22 | 1980-10-22 | Active boosting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55147926A JPS5771581A (en) | 1980-10-22 | 1980-10-22 | Active boosting circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5771581A JPS5771581A (en) | 1982-05-04 |
| JPS6212598B2 true JPS6212598B2 (enrdf_load_stackoverflow) | 1987-03-19 |
Family
ID=15441201
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55147926A Granted JPS5771581A (en) | 1980-10-22 | 1980-10-22 | Active boosting circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5771581A (enrdf_load_stackoverflow) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62165787A (ja) * | 1986-01-17 | 1987-07-22 | Toshiba Corp | 半導体記憶装置 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4052229A (en) * | 1976-06-25 | 1977-10-04 | Intel Corporation | Process for preparing a substrate for mos devices of different thresholds |
| US4162416A (en) * | 1978-01-16 | 1979-07-24 | Bell Telephone Laboratories, Incorporated | Dynamic sense-refresh detector amplifier |
| JPS5548894A (en) * | 1978-09-29 | 1980-04-08 | Nec Corp | Memory circuit |
-
1980
- 1980-10-22 JP JP55147926A patent/JPS5771581A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5771581A (en) | 1982-05-04 |
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