JPS6212532B2 - - Google Patents

Info

Publication number
JPS6212532B2
JPS6212532B2 JP57168280A JP16828082A JPS6212532B2 JP S6212532 B2 JPS6212532 B2 JP S6212532B2 JP 57168280 A JP57168280 A JP 57168280A JP 16828082 A JP16828082 A JP 16828082A JP S6212532 B2 JPS6212532 B2 JP S6212532B2
Authority
JP
Japan
Prior art keywords
instruction
memory access
buffer
access exception
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57168280A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5958550A (ja
Inventor
Hideaki Fujimaki
Masahiro Kuryama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57168280A priority Critical patent/JPS5958550A/ja
Publication of JPS5958550A publication Critical patent/JPS5958550A/ja
Publication of JPS6212532B2 publication Critical patent/JPS6212532B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP57168280A 1982-09-29 1982-09-29 命令フエツチトラツプ制御方式 Granted JPS5958550A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57168280A JPS5958550A (ja) 1982-09-29 1982-09-29 命令フエツチトラツプ制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57168280A JPS5958550A (ja) 1982-09-29 1982-09-29 命令フエツチトラツプ制御方式

Publications (2)

Publication Number Publication Date
JPS5958550A JPS5958550A (ja) 1984-04-04
JPS6212532B2 true JPS6212532B2 (en, 2012) 1987-03-19

Family

ID=15865085

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57168280A Granted JPS5958550A (ja) 1982-09-29 1982-09-29 命令フエツチトラツプ制御方式

Country Status (1)

Country Link
JP (1) JPS5958550A (en, 2012)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0622001B2 (ja) * 1985-12-18 1994-03-23 株式会社日立製作所 計算機システムのメモリ管理ユニット
AU607226B2 (en) * 1987-06-08 1991-02-28 Mitsubishi Heavy Industries, Ltd. Twin belt type continuous casting

Also Published As

Publication number Publication date
JPS5958550A (ja) 1984-04-04

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