JPS62123576U - - Google Patents

Description

[Brief explanation of the drawing]

FIG. 1 is a functional diagram of a pulse radar signal formatter device according to an embodiment of this invention, and FIG. 2 is a functional diagram of a conventional pulse radar signal formatter device.
FIG. 3 is a diagram showing the operating status of a conventional pulse radar signal formatter device, and FIG. 4 is a diagram showing the output of the pulse radar signal formatter device. In the figure, 1 is a signal conditioning circuit, 2 is an A/D conversion circuit, 3 is a memory circuit, and 4 is a signal conditioning circuit.
5 is an A/D conversion control circuit, 5 is a time signal generation circuit,
6 is a delay circuit, 7 is a multiplexer circuit, 8 is a counter circuit, A is a pulse radar video signal, and B is a trigger signal. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Scope of utility model registration request] A signal conditioning circuit for removing noise and adjusting the amplitude of the pulse radar video signal, an A/D conversion circuit for converting the output of this signal conditioning circuit into digital data, and a pulse radar signal converting circuit. An A/D converter that determines the A/D conversion start time from the synchronized trigger signal and outputs a sampling clock to the A/D converter circuit.
a D conversion control circuit, a memory circuit that sequentially stores digital data from the A/D conversion circuit and uses a trigger signal synchronized with a pulse radar signal as a reset signal, a counter circuit that counts the trigger signal, and A delay circuit for delaying a trigger signal for a certain period of time, and a multiplexer circuit for reading the output of the memory circuit and the output of the counter circuit in a prescribed order using the output signal of the delay circuit as a starting pulse. Characteristic pulse radar signal formatting device.