JPS59108938U - data acquisition circuit - Google Patents

data acquisition circuit

Info

Publication number
JPS59108938U
JPS59108938U JP15283U JP15283U JPS59108938U JP S59108938 U JPS59108938 U JP S59108938U JP 15283 U JP15283 U JP 15283U JP 15283 U JP15283 U JP 15283U JP S59108938 U JPS59108938 U JP S59108938U
Authority
JP
Japan
Prior art keywords
data
analog
access memory
multiplexer
random access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15283U
Other languages
Japanese (ja)
Other versions
JPS632921Y2 (en
Inventor
修作 梅田
奥村　昭二
Original Assignee
株式会社明電舎
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社明電舎 filed Critical 株式会社明電舎
Priority to JP15283U priority Critical patent/JPS59108938U/en
Publication of JPS59108938U publication Critical patent/JPS59108938U/en
Application granted granted Critical
Publication of JPS632921Y2 publication Critical patent/JPS632921Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Analogue/Digital Conversion (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例を示すブロック図、第２図は
第１図におけるコントローラ４の一実施例を示す回路図
である。　　− １・・・マルチプレクサ、２・・・アナログ−ディジタ
ル変換器、３・・・ランダムアクセスメモリ、４・・・
コントローラ、１０・・・クロックパルス発生器、１１
゜１２・・・分周回路、１３・・・ゲート回路、１４・
・・コンパレータ、１５・・・フリップフロップ。FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing an embodiment of the controller 4 in FIG. - 1... Multiplexer, 2... Analog-digital converter, 3... Random access memory, 4...
Controller, 10... Clock pulse generator, 11
゜12... Frequency divider circuit, 13... Gate circuit, 14...
...Comparator, 15...Flip-flop.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 多チャンネルのアナログデータを切換入力するマルチプ
レクサと、このマルチプレクサの出力データを順次ディ
ジタルデータに変換するアナログ−ディジタル変換器と
、このアナログ−ディジタル変換器の変換データを順次
記憶するランダムアクセスメモリと、コンピュータ側か
らの指令によって上記マルチプレクサ、アナログ−ディ
ジタル変換器及びランダムアクセスメモリの各種制御信
号を発生して多チャンネルのアナログデータを設定量だ
け該ランク私アクセスメモリに格納させ、この格納終了
で該コンピュータ側に割込み信号を発生して該ランダム
アクセスメモリの格納データを読出させるコントローラ
とを備えたことを特徴とするデータ収集回路。A multiplexer that switches and inputs multi-channel analog data, an analog-digital converter that sequentially converts the output data of the multiplexer into digital data, a random access memory that sequentially stores the converted data of the analog-digital converter, and a computer. Based on commands from the computer side, various control signals are generated for the multiplexer, analog-to-digital converter, and random access memory to store a set amount of multi-channel analog data in the access memory of the rank, and when this storage is completed, the computer side A data acquisition circuit comprising: a controller that generates an interrupt signal to read data stored in the random access memory.
JP15283U 1983-01-05 1983-01-05 data acquisition circuit Granted JPS59108938U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15283U JPS59108938U (en) 1983-01-05 1983-01-05 data acquisition circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15283U JPS59108938U (en) 1983-01-05 1983-01-05 data acquisition circuit

Publications (2)

Publication Number Publication Date
JPS59108938U true JPS59108938U (en) 1984-07-23
JPS632921Y2 JPS632921Y2 (en) 1988-01-25

Family

ID=30131900

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15283U Granted JPS59108938U (en) 1983-01-05 1983-01-05 data acquisition circuit

Country Status (1)

Country Link
JP (1) JPS59108938U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04185114A (en) * 1990-11-20 1992-07-02 Nippondenso Co Ltd Analog/digital(a/d) converter
JP2005033809A (en) * 2003-07-10 2005-02-03 Samsung Electronics Co Ltd Multiport interface device using one a/d converter and multifunction interface method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51142942A (en) * 1975-06-04 1976-12-08 Yokogawa Hokushin Electric Corp Analog input muitiplexer
JPS54122949A (en) * 1978-03-17 1979-09-22 Hitachi Ltd Analog input unit for computer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51142942A (en) * 1975-06-04 1976-12-08 Yokogawa Hokushin Electric Corp Analog input muitiplexer
JPS54122949A (en) * 1978-03-17 1979-09-22 Hitachi Ltd Analog input unit for computer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04185114A (en) * 1990-11-20 1992-07-02 Nippondenso Co Ltd Analog/digital(a/d) converter
JP2005033809A (en) * 2003-07-10 2005-02-03 Samsung Electronics Co Ltd Multiport interface device using one a/d converter and multifunction interface method
JP4615915B2 (en) * 2003-07-10 2011-01-19 三星電子株式会社 Multi-port interface device and multi-function interface method using one A / D converter

Also Published As

Publication number Publication date
JPS632921Y2 (en) 1988-01-25

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