JPS5879278U - Data recording and playback device - Google Patents

Data recording and playback device

Info

Publication number
JPS5879278U
JPS5879278U JP17447081U JP17447081U JPS5879278U JP S5879278 U JPS5879278 U JP S5879278U JP 17447081 U JP17447081 U JP 17447081U JP 17447081 U JP17447081 U JP 17447081U JP S5879278 U JPS5879278 U JP S5879278U
Authority
JP
Japan
Prior art keywords
data recording
playback device
state
reproducing device
reproducing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17447081U
Other languages
Japanese (ja)
Inventor
熊本 三矢戒
Original Assignee
株式会社日立メデイコ
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立メデイコ filed Critical 株式会社日立メデイコ
Priority to JP17447081U priority Critical patent/JPS5879278U/en
Publication of JPS5879278U publication Critical patent/JPS5879278U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図〜第4図は、従来のデータ収録再生装置における
問題点を説明するための図、第5図は、本考案の一実施
例の構成を示す図、第6図は、本考案のデータ圧縮変換
回路の一実施例の具体的構成を示す図、第7図は、第6
図のデータ圧縮変換回路の出力を説明するための図であ
る。 1・・・タイマ回路、2・・・データ圧縮変換回路、3
・・・記憶回路、4・・・アドレス回路、5・・・一致
回路、6・・・制御回路。
Figures 1 to 4 are diagrams for explaining problems in conventional data recording and reproducing devices, Figure 5 is a diagram showing the configuration of an embodiment of the present invention, and Figure 6 is a diagram showing the configuration of an embodiment of the present invention. FIG. 7 is a diagram showing a specific configuration of one embodiment of the data compression conversion circuit.
FIG. 3 is a diagram for explaining the output of the data compression conversion circuit shown in the figure. 1... Timer circuit, 2... Data compression conversion circuit, 3
. . . memory circuit, 4 . . . address circuit, 5 . . . coincidence circuit, 6 . . . control circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ランダムに入力するパルス信号の時間状態を電気的に記
録し、入力状態と同一状態でパルスを再生する機能を有
するデータ収録再生装置において、仮数指数変換又は対
数変換によりパルス間隔時間を圧縮する手段を備えたこ
とを特徴とするデータ収録再生装置。
In a data recording and reproducing device that has a function of electrically recording the time state of randomly input pulse signals and reproducing the pulses in the same state as the input state, a means for compressing the pulse interval time by mantissa exponent conversion or logarithmic conversion is provided. A data recording and reproducing device characterized by:
JP17447081U 1981-11-24 1981-11-24 Data recording and playback device Pending JPS5879278U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17447081U JPS5879278U (en) 1981-11-24 1981-11-24 Data recording and playback device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17447081U JPS5879278U (en) 1981-11-24 1981-11-24 Data recording and playback device

Publications (1)

Publication Number Publication Date
JPS5879278U true JPS5879278U (en) 1983-05-28

Family

ID=29966480

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17447081U Pending JPS5879278U (en) 1981-11-24 1981-11-24 Data recording and playback device

Country Status (1)

Country Link
JP (1) JPS5879278U (en)

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