JPS613588U

JPS613588U - counter circuit

Info

Publication number: JPS613588U
Application number: JP8766184U
Authority: JP
Inventors: 司福井
Original assignee: 三洋電機株式会社
Priority date: 1984-06-13
Filing date: 1984-06-13
Publication date: 1986-01-10

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図け本考案実施例の回路ブロック図、第２図はフロ
ーチャート、第３図は機能ブロック図である。２０・・・カウンタ手段、２１・・・設定手段、２２・
・・検出手段、２４・・・制御手段、２・・・システム
コントロール回路、１０・・・設定指令信号作成手段、
２６・・・メモリーパルス出力手段、１４・・・カウン
タメモ．リー状態設定信号作成手段。FIG. 1 is a circuit block diagram of an embodiment of the present invention, FIG. 2 is a flowchart, and FIG. 3 is a functional block diagram. 20... Counter means, 21... Setting means, 22.
... detection means, 24 ... control means, 2 ... system control circuit, 10 ... setting command signal generation means,
26...Memory pulse output means, 14...Counter memo. Means for creating a green state setting signal.

Claims

[Scope of utility model registration request]

- counter means for counting pulses related to tape running, setting means for setting the contents of the counter means to a predetermined value by a setting command signal, and detecting that the contents of the counter means have reached the predetermined value; A counter circuit comprising: a detection means for outputting a detection output; and a control means for setting the detection means to a counter memory state in which the detection means is substantially activated by a counter memory state setting signal,
means for creating a recording command signal in a recording mode, means for creating the setting command signal based on the recording command signal, and generating a memory pulse when the counter memory state is not in the recording mode based on the recording command signal. A counter circuit comprising: means for outputting; and means for creating the counter memory state setting signal based on the memory pulse.