JPS63120425U - - Google Patents

Description

[Brief explanation of the drawing]

Fig. 1 is a configuration block diagram of the starting circuit according to the present invention, Figs. 2 and 3 are waveform diagrams showing an example of operation, and Fig. 4 can be determined according to the state of each signal output from the starting circuit. An explanatory diagram showing the operating state of the A/D converter, FIG. 5 is a block diagram of an isolated analog input circuit to which the circuit of the present invention is applied, and FIG. 6 is a conventional startup circuit used in FIG. 5. FIG. 7 is an operational waveform diagram of FIGS. 5 and 6. 1...First memory circuit, 2...Second memory circuit, 3
...Delay circuit, 4...NAND circuit, 5...Third memory circuit, 6...Buffer.

Claims (1)

[Claims for Utility Model Registration] A starting circuit that starts up the operation of an A/D converter and outputs a signal indicating the operating state of the A/D converter to an external circuit, which A first memory circuit that is set by the A/D conversion request signal and reset by the A/D conversion end signal from the A/D converter to output an A/D start signal;
A second memory circuit that is reset by the D conversion ready signal and outputs an A/D standby signal, a delay circuit that delays the output from the second memory circuit by a certain period of time, and a signal delayed by the delay circuit and the first memory circuit. The A/D converter is set by the output of the NAND circuit and reset by the A/D conversion ready signal.
A third storage circuit that outputs a conversion activation signal, and a buffer that inputs the early A/D activation signal, A/D standby signal, and A/D conversion activation signal and allows the state of each of these signals to be read from an external circuit. A starting circuit for an A/D converter, comprising: