JPS62107445U - - Google Patents

Info

Publication number
JPS62107445U
JPS62107445U JP20176185U JP20176185U JPS62107445U JP S62107445 U JPS62107445 U JP S62107445U JP 20176185 U JP20176185 U JP 20176185U JP 20176185 U JP20176185 U JP 20176185U JP S62107445 U JPS62107445 U JP S62107445U
Authority
JP
Japan
Prior art keywords
hole
integrated circuit
circuit device
hybrid integrated
metal body
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20176185U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP20176185U priority Critical patent/JPS62107445U/ja
Publication of JPS62107445U publication Critical patent/JPS62107445U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32153—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
    • H01L2224/32175—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic
    • H01L2224/32188—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic the layer connector connecting to a bonding area protruding from the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Wire Bonding (AREA)

Description

【図面の簡単な説明】
第１図は従来装置の断面図、第２図、第３図及
び第４図は本考案の実施例構造図である。図にお
いて１は絶縁基板、２はパターン、３はヒートシ
ンク（金属体）、４は半導体チツプ、５は半田、
６はワイヤ、７はヒートシンクのかど部、８，８
′は貫通孔、９は凸形型状のヒートシンク、１０
は凸形形状の貫通孔である。

Claims (1)

  1. 【実用新案登録請求の範囲】 (1) 絶縁基板上に半導体ペレツトを実装してな
    る混成集積回路装置において、該絶縁基板の所要
    部に孔を設け、該孔に金属体を埋設すると共に該
    金属体上に該半導体ペレツトを固着し、かつ該半
    導体ペレツトの上面の高さが該絶縁基板の上面と
    同等もしくはそれ以下に位置するようにしたこと
    を特徴とする混成集積回路装置。 (2) 該金属体の断面形状を凸形状としたことを
    特徴とする実用新案登録請求の範囲第(1)項記載
    の混成集積回路装置。 (3) 該孔の断面形状を凸形状としたことを特徴
    とする実用新案登録請求の範囲第(1)項、第(2)項
    記載の混成集積回路装置。
JP20176185U 1985-12-25 1985-12-25 Pending JPS62107445U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20176185U JPS62107445U (ja) 1985-12-25 1985-12-25

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20176185U JPS62107445U (ja) 1985-12-25 1985-12-25

Publications (1)

Publication Number Publication Date
JPS62107445U true JPS62107445U (ja) 1987-07-09

Family

ID=31165516

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20176185U Pending JPS62107445U (ja) 1985-12-25 1985-12-25

Country Status (1)

Country Link
JP (1) JPS62107445U (ja)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5856443A (ja) * 1981-09-30 1983-04-04 Nec Corp 半導体装置
JPS5874048A (ja) * 1981-10-29 1983-05-04 Mitsubishi Electric Corp 半導体集積回路の実装方式

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5856443A (ja) * 1981-09-30 1983-04-04 Nec Corp 半導体装置
JPS5874048A (ja) * 1981-10-29 1983-05-04 Mitsubishi Electric Corp 半導体集積回路の実装方式

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