JPH0213728U - - Google Patents

Info

Publication number
JPH0213728U
JPH0213728U JP9229488U JP9229488U JPH0213728U JP H0213728 U JPH0213728 U JP H0213728U JP 9229488 U JP9229488 U JP 9229488U JP 9229488 U JP9229488 U JP 9229488U JP H0213728 U JPH0213728 U JP H0213728U
Authority
JP
Japan
Prior art keywords
resin
wiring board
integrated circuit
hybrid integrated
insulating wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9229488U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9229488U priority Critical patent/JPH0213728U/ja
Publication of JPH0213728U publication Critical patent/JPH0213728U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/27011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
    • H01L2224/27013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83009—Pre-treatment of the layer connector or the bonding area
    • H01L2224/83051—Forming additional members, e.g. dam structures

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Die Bonding (AREA)

Description

【図面の簡単な説明】
第１図ａは本考案の第１の実施例を示す平面図
、第１図ｂは第１図ａのＡ―Ａ′線断面図、第２
図はペレツトをマウントした状態を示す断面図、
第３図は第２の実施例を示す平面図、第４図は従
来例を示すダイマウントランド部の平面図である
。 １…絶縁性配線基板、２…ダイマウントランド
、３，３′…スリツト、４ａ…アイランド、４ｂ
…リード、５…ろう材、６…ペレツト、７…配線
導体。

Claims (1)

    【実用新案登録請求の範囲】
  1. 金属製のアイランドに絶縁性配線基板を接着し
    た回路基板を樹脂封止してなる樹脂封止型混成集
    積回路において、前記絶縁性配線基板のダイマウ
    ントランドには、所定パターンのろう材流れ防止
    用のスリツトが設けられていることを特徴とする
    樹脂封止型混成集積回路。
JP9229488U 1988-07-11 1988-07-11 Pending JPH0213728U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9229488U JPH0213728U (ja) 1988-07-11 1988-07-11

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9229488U JPH0213728U (ja) 1988-07-11 1988-07-11

Publications (1)

Publication Number Publication Date
JPH0213728U true JPH0213728U (ja) 1990-01-29

Family

ID=31316741

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9229488U Pending JPH0213728U (ja) 1988-07-11 1988-07-11

Country Status (1)

Country Link
JP (1) JPH0213728U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08181166A (ja) * 1994-12-22 1996-07-12 Ibiden Co Ltd プリント配線板

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08181166A (ja) * 1994-12-22 1996-07-12 Ibiden Co Ltd プリント配線板

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