JPS642445U - - Google Patents
Info
- Publication number
- JPS642445U JPS642445U JP1987096671U JP9667187U JPS642445U JP S642445 U JPS642445 U JP S642445U JP 1987096671 U JP1987096671 U JP 1987096671U JP 9667187 U JP9667187 U JP 9667187U JP S642445 U JPS642445 U JP S642445U
- Authority
- JP
- Japan
- Prior art keywords
- power semiconductor
- pattern
- circuit board
- copper
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 claims description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Description
第1図a〜cは、本考案に係る電力半導体装置
の回路基板のパターン例で、同図aは上面パター
ンを示す図、同図bは下面パターンを示す図、同
図cは回路基板の側面図、第2図は電力半導体装
置の内部構造を示す断面図、第3図a,bは従来
の回路基板のパターン例で、それぞれ同図aは上
面パターンを示す図、同図bは下面パターンを示
す図である。 1……内部回路基板、2……上面の銅パターン
、3,3′……下面の銅パターン。
の回路基板のパターン例で、同図aは上面パター
ンを示す図、同図bは下面パターンを示す図、同
図cは回路基板の側面図、第2図は電力半導体装
置の内部構造を示す断面図、第3図a,bは従来
の回路基板のパターン例で、それぞれ同図aは上
面パターンを示す図、同図bは下面パターンを示
す図である。 1……内部回路基板、2……上面の銅パターン
、3,3′……下面の銅パターン。
Claims (1)
- アルミナをベースにして、その両面に銅パター
ンが形成された回路基板の下面に放熱器を備えた
電力半導体装置において、前記下面の銅パターン
を複数個に分割した形状にパターン形成したこと
を特徴とする電力半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987096671U JPS642445U (ja) | 1987-06-23 | 1987-06-23 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987096671U JPS642445U (ja) | 1987-06-23 | 1987-06-23 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS642445U true JPS642445U (ja) | 1989-01-09 |
Family
ID=31321726
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1987096671U Pending JPS642445U (ja) | 1987-06-23 | 1987-06-23 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS642445U (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02211655A (ja) * | 1989-02-10 | 1990-08-22 | Mitsubishi Electric Corp | 自動車用混成集積回路装置 |
-
1987
- 1987-06-23 JP JP1987096671U patent/JPS642445U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02211655A (ja) * | 1989-02-10 | 1990-08-22 | Mitsubishi Electric Corp | 自動車用混成集積回路装置 |