JPS62106561A - Processing system for transferring status - Google Patents

Abstract

PURPOSE:To improve the processing efficiency for transfer of status by preparing the status while the processing is carried out in accordance with a command and transferring data and the status continuously. CONSTITUTION:The status corresponding to the normal end is prepared and set to a status register 6 while a microprocessor 3 carries out the processing in accordance with the transfer of data and sets data successively to a memory 5. Then the processor 3 gives an instruction to an interface control part 4 to transfer data toward a channel 1. Thus the contents of the register 6 are transferred continuously to the data on the memory 5 in response to the transfer of data carried out by the part 4. Thus it is possible at least to report early the status that is through normally.

Description

DETAILED DESCRIPTION OF THE INVENTION [(Already required)] In an input/output side device such as an input/output control device or an input/output device where control is performed to report status upon data transfer corresponding to a command.

It is disclosed that the status is prepared while processing corresponding to a command is executed, and data and status are transferred continuously.

[Industrial application field]

The present invention relates to a status transfer processing method, and particularly to a status transfer processing method configured to be able to send out a completed status at an early stage.

[Conventional technology]

Input/output control connected to host device! When an A device or an input/output device performs data transfer in response to a command from a higher-level device, it sends a status to the higher-level device to report whether it has ended normally or abnormally. In the conventional case, the status corresponding to the data transfer is created after the data transfer is completed and it is determined whether the data transfer has ended normally or abnormally, and is reported to the host device.

[Problem that the invention seeks to solve]

In the conventional case, as described above, it is determined whether the data transfer has ended normally or not after the end of the data transfer, and therefore it takes time to report the status. In particular, microprocessors have recently been used for human output control devices or input/output devices (herein referred to as input/output devices), and the processing speed of the microprocessors is slow. In particular, the reduction in efficiency becomes noticeable when the channel interface is in block multiplexer channel (BMC) mode.

[Means for solving problems]

The present invention solves the above problem by preparing a status corresponding to normal termination while executing a process corresponding to a command.

FIG. 1 shows a basic configuration diagram of the present invention. In the figure, 1 is a channel, 2 is an input/output side device, 3 is a microprocessor, 4 is an interface control unit, 5 is a data holding memory,
6 represents a status register.

In the input/output device 2, the microprocessor 3 executes corresponding processing in response to commands from the channel 1. For example, if the command corresponds to data transfer, the microprocessor 3 executes a process of sequentially setting transfer data in the memory 5.

The interface control unit 4 receives instructions from the microprocessor 3 and transfers the contents of the memory 5 and the status register 6 to the channel 1.

(Function) In the case of the present invention, while the microprocessor 3 executes processing corresponding to data transfer and sets data one after another in the memory 5, it also prepares a status corresponding to normal termination. The microprocessor 3 operates to set the data in the register 6. Then, the microprocessor 3 instructs the interface control unit 4 to transfer data to the channel 1 side.

For this reason, in response to the data transfer operation by the interface control unit 4, the contents of the status register 6 are transferred consecutively to the data on the memory 5, and at least the normal completion status is reported at an early stage. becomes possible.

〔Example〕

FIG. 2 shows the configuration of an embodiment of the present invention. Code 2 in the figure.
3, 4.5 correspond to Fig. 1, 7 is the driver/receiver section, 8 is the command register, and 9 is the asynchronous status/receiver section.
register, 10 is an address storage unit for notifying the channel;
11 is an initial status generation unit that creates a status based on a command; 12 is a multiplexer;
3 represents a channel interface.

The command from channel 1 is set in command register 8, and this content is sent to initial status generator 1.
1 and microprocessor 3 are notified. On the other hand, the interface control section 4.

Receives channel control information and performs operations related to the interface.

The microprocessor 3 decodes the above command and performs processing corresponding to the command. If the command corresponds to data transfer, the microprocessor 3 sets the data to be transferred in the memory 5 one after another. During this time, the microprocessor 3 uses the interval in the processing to prepare a normal termination status and sets it in the status register 6 in anticipation of a normal termination. On the other hand, the microprocessor 3 instructs the interface control section 4 to transfer data.

The interface control unit 4 corresponds to this.

Following the transfer of the contents of memory 5, the contents of status register 6 are transferred.

〔Effect of the invention〕

As explained above, (1) according to the present invention, (2) it becomes possible to notify the status at least regarding normal completion status following data transfer, and processing efficiency is greatly improved in the case of an interface in 8MC mode, etc. improves.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the principle configuration of the present invention, and FIG. 2 is a diagram showing the configuration of essential parts of an embodiment of the present invention. In the figure, ■ represents a channel, 2 represents an input/output side device, 3 represents a microprocessor, 4 represents an interface control section, 5 represents a data holding memory, and 6 represents a status register.

Claims (1)

[Scope of Claims] An input/output device connected to the host device (1) and sending a status to the host device (1) to notify whether the data transfer corresponding to a command has ended normally or abnormally. (2) comprises an interface control unit (4) that performs interface control corresponding to the host device (1), and a microprocessor (3) that executes processing in the input/output device (2); The microprocessor (3) is configured to prepare a status corresponding to the normal termination while executing the process corresponding to the command, and the interface control unit (4) is configured to prepare a status corresponding to the normal termination. A status transfer processing method characterized in that the prepared status is transferred successively to the data to be transferred.