JPS62101198U - - Google Patents
Info
- Publication number
- JPS62101198U JPS62101198U JP19229785U JP19229785U JPS62101198U JP S62101198 U JPS62101198 U JP S62101198U JP 19229785 U JP19229785 U JP 19229785U JP 19229785 U JP19229785 U JP 19229785U JP S62101198 U JPS62101198 U JP S62101198U
- Authority
- JP
- Japan
- Prior art keywords
- shift register
- flip
- flops
- output terminals
- register circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Shift Register Type Memory (AREA)
- Tests Of Electronic Circuits (AREA)
Description
第１図は本考案の実施例を示すシフトレジスタ
回路図であり、第２図は第１図に示したシフトレ
ジスタ回路のタイムチヤート図である。
１０……データ出力端子、２０……クロツク出
力端子、Ｆ１１〜Ｆ１５……フリツプフロツプ、
Ｑ１〜Ｑ５……出力端子、２１〜２５……出力回
路、Ｎ１１……インバータ、ｃ……クロツク信号
、ｄ……データ信号、ｑ１〜ｑ５……出力信号。
FIG. 1 is a shift register circuit diagram showing an embodiment of the present invention, and FIG. 2 is a time chart of the shift register circuit shown in FIG. 1. 10...Data output terminal, 20...Clock output terminal, F11-F15...Flip-flop,
Q1-Q5...Output terminal, 21-25...Output circuit, N11...Inverter, c...Clock signal, d...Data signal, q1-q5...Output signal.
Claims (1)
段縦続接続されてなるシフトレジスタ回路におい
て、 前記フリツプフロツプの所定の出力端子に論理
上必要でない論理回路を接続することにより、前
記フリツプフロツプ各段の等しい数の出力端子が
前記論理回路を含む他の回路に接続されてなるこ
とを特徴とするシフトレジスタ回路。[Claims for Utility Model Registration] In a shift register circuit in which flip-flops each having a plurality of output terminals are connected in cascade, each of the flip-flops is A shift register circuit characterized in that output terminals of an equal number of stages are connected to other circuits including the logic circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985192297U JPH0355200Y2 (en) | 1985-12-16 | 1985-12-16 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985192297U JPH0355200Y2 (en) | 1985-12-16 | 1985-12-16 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62101198U true JPS62101198U (en) | 1987-06-27 |
| JPH0355200Y2 JPH0355200Y2 (en) | 1991-12-06 |
Family
ID=31147242
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985192297U Expired JPH0355200Y2 (en) | 1985-12-16 | 1985-12-16 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0355200Y2 (en) |
-
1985
- 1985-12-16 JP JP1985192297U patent/JPH0355200Y2/ja not_active Expired
Non-Patent Citations (1)
| Title |
|---|
| MS1 CELL LIBRARY=S59 * |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0355200Y2 (en) | 1991-12-06 |
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