JPS616824A - 半導体基板目合せ法 - Google Patents

半導体基板目合せ法

Info

Publication number
JPS616824A
JPS616824A JP59126785A JP12678584A JPS616824A JP S616824 A JPS616824 A JP S616824A JP 59126785 A JP59126785 A JP 59126785A JP 12678584 A JP12678584 A JP 12678584A JP S616824 A JPS616824 A JP S616824A
Authority
JP
Japan
Prior art keywords
pattern
alignment
cutting
patterns
delta
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59126785A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0347570B2 (enrdf_load_stackoverflow
Inventor
Tetsuo Yoshino
吉野　哲夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP59126785A priority Critical patent/JPS616824A/ja
Publication of JPS616824A publication Critical patent/JPS616824A/ja
Publication of JPH0347570B2 publication Critical patent/JPH0347570B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
JP59126785A 1984-06-20 1984-06-20 半導体基板目合せ法 Granted JPS616824A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59126785A JPS616824A (ja) 1984-06-20 1984-06-20 半導体基板目合せ法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59126785A JPS616824A (ja) 1984-06-20 1984-06-20 半導体基板目合せ法

Publications (2)

Publication Number Publication Date
JPS616824A true JPS616824A (ja) 1986-01-13
JPH0347570B2 JPH0347570B2 (enrdf_load_stackoverflow) 1991-07-19

Family

ID=14943874

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59126785A Granted JPS616824A (ja) 1984-06-20 1984-06-20 半導体基板目合せ法

Country Status (1)

Country Link
JP (1) JPS616824A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007273727A (ja) * 2006-03-31 2007-10-18 Mitsubishi Electric Corp アライメントマーク及びその形成方法、半導体装置及びその製造方法
US11322627B2 (en) 2018-09-19 2022-05-03 Kabushiki Kaisha Toshiba Solar cell, multi-junction solar cell, solar cell module, and solar power generation system

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5340285A (en) * 1976-09-25 1978-04-12 Fujitsu Ltd Detection method for position-matching error
JPS53114675A (en) * 1977-03-17 1978-10-06 Toshiba Corp Mark for mask alignment
JPS5418677A (en) * 1977-07-12 1979-02-10 Matsushita Electric Ind Co Ltd Positioning mark for photo etching
JPS55158633A (en) * 1979-05-29 1980-12-10 Hitachi Ltd Dielectric insulation isolating wafer with reference pattern
JPS5748234A (en) * 1980-09-08 1982-03-19 Fujitsu Ltd Position adjusting method of semiconductor device
JPS5963728A (ja) * 1982-10-04 1984-04-11 Matsushita Electronics Corp 半導体装置の製造方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5340285A (en) * 1976-09-25 1978-04-12 Fujitsu Ltd Detection method for position-matching error
JPS53114675A (en) * 1977-03-17 1978-10-06 Toshiba Corp Mark for mask alignment
JPS5418677A (en) * 1977-07-12 1979-02-10 Matsushita Electric Ind Co Ltd Positioning mark for photo etching
JPS55158633A (en) * 1979-05-29 1980-12-10 Hitachi Ltd Dielectric insulation isolating wafer with reference pattern
JPS5748234A (en) * 1980-09-08 1982-03-19 Fujitsu Ltd Position adjusting method of semiconductor device
JPS5963728A (ja) * 1982-10-04 1984-04-11 Matsushita Electronics Corp 半導体装置の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007273727A (ja) * 2006-03-31 2007-10-18 Mitsubishi Electric Corp アライメントマーク及びその形成方法、半導体装置及びその製造方法
US11322627B2 (en) 2018-09-19 2022-05-03 Kabushiki Kaisha Toshiba Solar cell, multi-junction solar cell, solar cell module, and solar power generation system

Also Published As

Publication number Publication date
JPH0347570B2 (enrdf_load_stackoverflow) 1991-07-19

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