JPS6347331B2 - - Google Patents

Info

Publication number
JPS6347331B2
JPS6347331B2 JP58082507A JP8250783A JPS6347331B2 JP S6347331 B2 JPS6347331 B2 JP S6347331B2 JP 58082507 A JP58082507 A JP 58082507A JP 8250783 A JP8250783 A JP 8250783A JP S6347331 B2 JPS6347331 B2 JP S6347331B2
Authority
JP
Japan
Prior art keywords
single crystal
alignment mark
alignment
integrated circuit
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58082507A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59208722A (ja
Inventor
Hisashi Mizuide
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP58082507A priority Critical patent/JPS59208722A/ja
Publication of JPS59208722A publication Critical patent/JPS59208722A/ja
Publication of JPS6347331B2 publication Critical patent/JPS6347331B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Element Separation (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
JP58082507A 1983-05-13 1983-05-13 半導体集積回路装置用合せマ−ク Granted JPS59208722A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58082507A JPS59208722A (ja) 1983-05-13 1983-05-13 半導体集積回路装置用合せマ−ク

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58082507A JPS59208722A (ja) 1983-05-13 1983-05-13 半導体集積回路装置用合せマ−ク

Publications (2)

Publication Number Publication Date
JPS59208722A JPS59208722A (ja) 1984-11-27
JPS6347331B2 true JPS6347331B2 (enrdf_load_stackoverflow) 1988-09-21

Family

ID=13776417

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58082507A Granted JPS59208722A (ja) 1983-05-13 1983-05-13 半導体集積回路装置用合せマ−ク

Country Status (1)

Country Link
JP (1) JPS59208722A (enrdf_load_stackoverflow)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6077421A (ja) * 1983-10-05 1985-05-02 Fujitsu Ltd 位置合わせ方法
JPS60160122A (ja) * 1984-01-30 1985-08-21 Rohm Co Ltd サーマルプリントヘッドの製造方法
JP2751214B2 (ja) * 1988-06-24 1998-05-18 ソニー株式会社 半導体基板

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50153862U (enrdf_load_stackoverflow) * 1974-06-07 1975-12-20

Also Published As

Publication number Publication date
JPS59208722A (ja) 1984-11-27

Similar Documents

Publication Publication Date Title
US4233091A (en) Method of manufacturing semiconductor devices having improved alignment marks
US5369050A (en) Method of fabricating semiconductor device
EP0039411B1 (en) Process for fabricating an integrated pnp and npn transistor structure
US4378630A (en) Process for fabricating a high performance PNP and NPN structure
US20030094674A1 (en) Semiconductor wafer
JPS58210634A (ja) 半導体装置の製造方法
US3844858A (en) Process for controlling the thickness of a thin layer of semiconductor material and semiconductor substrate
JP2918299B2 (ja) 半導体圧力センサおよびそれを有する半導体装置の製造方法
US4468857A (en) Method of manufacturing an integrated circuit device
US3969749A (en) Substrate for dielectric isolated integrated circuit with V-etched depth grooves for lapping guide
EP0174986A4 (en) METHOD FOR FORMING AND POSITIONING UNDERGROUND LAYERS.
JPS6347331B2 (enrdf_load_stackoverflow)
JPH1145874A (ja) 半導体装置の製造方法
JP3276146B2 (ja) 半導体装置及びその製造方法
JPS59182538A (ja) 半導体装置およびその製造方法
JPH07142572A (ja) 半導体装置の製造方法
JPS60229334A (ja) 半導体装置の製造方法
JPH0396249A (ja) 半導体装置の製造方法
JPH0347570B2 (enrdf_load_stackoverflow)
JP3107624B2 (ja) マスク位置合わせのための基準パターン形成方法
JPH0481329B2 (enrdf_load_stackoverflow)
JPH1154607A (ja) 半導体装置の製造方法
JPS5840337B2 (ja) 半導体集積回路の製造方法
JPS6359532B2 (enrdf_load_stackoverflow)
JPS60128633A (ja) 半導体装置ならびにその製造方法