JPS6165757U - - Google Patents

Info

Publication number
JPS6165757U
JPS6165757U JP15024984U JP15024984U JPS6165757U JP S6165757 U JPS6165757 U JP S6165757U JP 15024984 U JP15024984 U JP 15024984U JP 15024984 U JP15024984 U JP 15024984U JP S6165757 U JPS6165757 U JP S6165757U
Authority
JP
Japan
Prior art keywords
thickness
coating layer
alloy
copper
lead frame
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15024984U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15024984U priority Critical patent/JPS6165757U/ja
Publication of JPS6165757U publication Critical patent/JPS6165757U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】
第1図は本考案によるリードフレームを用いた
パツケージの一例の断面図である。第2図はリー
ドフレーム平面図例で、第3図はレジンモールド
DIP型半導体の断面図例である。 1:リードフレームのタブ部、2:インナーリ
ード部、3:Siチツプ、4:接着剤又はろう、
5:金属細線、6:電極パツド、7:樹脂、8:
アウターリード部、9:リードフレーム基材、1
0:Ni材被覆層、11:Pd材薄層。

Claims (1)

    【実用新案登録請求の範囲】
  1. 半導体パツケージに使用されるリードフレーム
    において、銅又は銅合金からなる基材の表面に、
    Ni又はCo或いはこれらの合金からなる厚さ0
    .05μ以上の被覆層が設けられ、少なくもワイ
    ヤボンドされるインナーリーリード部には上記被
    覆層の上に更にPd又はRu或いはこれらの合金
    からなる厚さ0.01〜0.2μの薄層が設けら
    れていることを特徴とする半導体リードフレーム
JP15024984U 1984-10-05 1984-10-05 Pending JPS6165757U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15024984U JPS6165757U (ja) 1984-10-05 1984-10-05

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15024984U JPS6165757U (ja) 1984-10-05 1984-10-05

Publications (1)

Publication Number Publication Date
JPS6165757U true JPS6165757U (ja) 1986-05-06

Family

ID=30708402

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15024984U Pending JPS6165757U (ja) 1984-10-05 1984-10-05

Country Status (1)

Country Link
JP (1) JPS6165757U (ja)

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