JPS6161847U - - Google Patents

Info

Publication number
JPS6161847U
JPS6161847U JP1984146667U JP14666784U JPS6161847U JP S6161847 U JPS6161847 U JP S6161847U JP 1984146667 U JP1984146667 U JP 1984146667U JP 14666784 U JP14666784 U JP 14666784U JP S6161847 U JPS6161847 U JP S6161847U
Authority
JP
Japan
Prior art keywords
support plate
electrode
diode chip
integrated
main surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1984146667U
Other languages
Japanese (ja)
Other versions
JPH0322925Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1984146667U priority Critical patent/JPH0322925Y2/ja
Publication of JPS6161847U publication Critical patent/JPS6161847U/ja
Application granted granted Critical
Publication of JPH0322925Y2 publication Critical patent/JPH0322925Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/404—Connecting portions
    • H01L2224/40475—Connecting portions connected to auxiliary connecting means on the bonding areas
    • H01L2224/40491—Connecting portions connected to auxiliary connecting means on the bonding areas being an additional member attached to the bonding area through an adhesive or solder, e.g. buffer pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案の第１の実施例に係わる整流装
置の内部を示す平面図、第２図は第１図の−
線部分の断面図、第３図は第１図の−線部分
の断面図、第４図は第１図のダイオードチツプの
断面図、第５図は第３図の一部を拡大して示す断
面図、第６図は第１図の装置に使用するリードフ
レームを示す平面図、第７図は第６図の−線
の部分を示す断面図、第８図は完成した整流装置
を示す斜視図、第９図は第１図の装置の接続を示
す回路図、第１０図は第２の実施例の整流装置を
リードフレームの状態で示す平面図、第１１図は
第１０図の−線の一部を示す断面図、第
１２図は第３の実施例の整流装置をリードフレー
ムの状態で示す平面図、第１３図は第４の実施例
の整流装置をリードフレームの状態で示す平面図
、第１４図は従来の整流装置の平面図、第１５図
は第１４図の−線部分の断面図である。 １，２，３，４…外部リード、５，６，７，８
…支持板、９，１０，１１，１２…内部リード、
１７…絶縁物質。 FIG. 1 is a plan view showing the inside of a rectifier according to the first embodiment of the present invention, and FIG.
3 is a sectional view of the line portion in FIG. 1, FIG. 4 is a sectional view of the diode chip in FIG. 1, and FIG. 5 is an enlarged view of a part of FIG. 3. 6 is a plan view showing the lead frame used in the device shown in FIG. 1, FIG. 7 is a sectional view showing the portion marked by the - line in FIG. 6, and FIG. 8 is a perspective view showing the completed rectifier. Figure 9 is a circuit diagram showing the connection of the device in Figure 1, Figure 10 is a plan view showing the rectifier of the second embodiment in a lead frame state, and Figure 11 is the - line in Figure 10. 12 is a plan view showing the rectifying device of the third embodiment in a lead frame state, and FIG. 13 is a plan view showing the rectifying device of the fourth embodiment in the lead frame state. 14 is a plan view of a conventional rectifier, and FIG. 15 is a sectional view taken along the line - in FIG. 14. 1, 2, 3, 4...external lead, 5, 6, 7, 8
...Support plate, 9, 10, 11, 12...Internal lead,
17...Insulating material.

Claims (1)

【実用新案登録請求の範囲】 一方の電極が一方の主面に設けられ、他方の電
極が他方の主面に設けられた同一極性の少なくと
も第１、第２、第３及び第４のダイオードチツプ
Ｄ１，Ｄ２，Ｄ３，Ｄ４がブリツジ接続され、前
記少なくとも第１、第２、第３及び第４のダイオ
ードチツプＤ１，Ｄ２，Ｄ３，Ｄ４のための第１
、第２、第３及び第４の外部リード１，２，３，
４の先端側が封止絶縁物質から導出されている構
造の単相又は多相のブリツジ型絶縁物封止整流装
置において、 前記第１の外部リード１に一体化されている導
電性の第１の支持板５、前記第２の外部リード２
に一体化されている導電性の第２の支持板６、前
記第３の外部リード３に一体化されている導電性
の第３の支持板７、及び前記第４の外部リード４
に一体化されている導電性の第４の支持板８が少
なくとも設けられ、 前記第１、第２、第３及び第４の支持板５，６
，７，８はこれ等の一方の主面が同一の方向性を
有するように配置され、 前記第１の支持板５の一方の主面に前記第１及
び第２のダイオードチツプＤ１，Ｄ２の一方の極
がそれぞれ固着され、 前記第２の支持板６の一方の主面に前記第３の
ダイオードチツプＤ３の一方の電極が固着され、 前記第３の支持板７の一方の主面に前記第４の
ダイオードチツプＤ４の一方の電極が固着され、 前記第１のダイオードチツプＤ１の他方の電極
と前記第２の支持板６との間、前記第２のダイオ
ードチツプＤ２の他方の電極と前記第３の支持板
７との間、前記第３のダイオードチツプＤ３の他
方の電極と前記第４の支持板８との間、及び前記
第４のダイオードチツプＤ４の他方の電極と前記
第４の支持板８との間が第１、第２、第３及び第
４の内部リード９，１０，１１，１２でそれぞれ
接続されていることを特徴とする単相又は多相ブ
リツジ型絶縁物封止整流装置。[Claims for Utility Model Registration] At least first, second, third and fourth diode chips of the same polarity, with one electrode provided on one main surface and the other electrode provided on the other main surface. D 1 , D 2 , D 3 , D 4 are bridge-connected, and the first, second, third and fourth diode chips D 1 , D 2 , D 3 , D 4 are
, second, third and fourth external leads 1, 2, 3,
In a single-phase or multi-phase bridge-type insulator-sealed rectifier having a structure in which the tip side of the lead 4 is led out from a sealing insulating material, the conductive first lead 1 integrated with the first external lead 1 support plate 5 and the second external lead 2
a conductive second support plate 6 integrated with the third external lead 3; a third conductive support plate 7 integrated with the third external lead 3; and a third conductive support plate 7 integrated with the fourth external lead 4.
At least a fourth conductive support plate 8 is provided which is integrated with the first, second, third and fourth support plates 5, 6.
, 7, and 8 are arranged such that one main surface thereof has the same directionality, and the first and second diode chips D 1 , D One electrode of the third diode chip D3 is fixed to one main surface of the second support plate 6, and one main electrode of the third diode chip D3 is fixed to one main surface of the second support plate 6. One electrode of the fourth diode chip D4 is fixed to the surface, and the second diode chip D2 is connected between the other electrode of the first diode chip D1 and the second support plate 6. between the other electrode of the third diode chip D3 and the third support plate 7, between the other electrode of the third diode chip D3 and the fourth support plate 8, and of the fourth diode chip D4 . A single-phase or Multiphase bridge type insulator-sealed rectifier.
JP1984146667U 1984-09-28 1984-09-28 Expired JPH0322925Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984146667U JPH0322925Y2 (en) 1984-09-28 1984-09-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984146667U JPH0322925Y2 (en) 1984-09-28 1984-09-28

Publications (2)

Publication Number Publication Date
JPS6161847U true JPS6161847U (en) 1986-04-25
JPH0322925Y2 JPH0322925Y2 (en) 1991-05-20

Family

ID=30704901

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984146667U Expired JPH0322925Y2 (en) 1984-09-28 1984-09-28

Country Status (1)

Country Link
JP (1) JPH0322925Y2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01115183U (en) * 1988-01-28 1989-08-02
JPH0682862U (en) * 1991-03-14 1994-11-25 新電元工業株式会社 Bridge type semiconductor device
JP2009110981A (en) * 2007-10-26 2009-05-21 Mitsubishi Electric Corp Semiconductor module
JP2014072349A (en) * 2012-09-28 2014-04-21 Sanken Electric Co Ltd Semiconductor device
JP2014072350A (en) * 2012-09-28 2014-04-21 Sanken Electric Co Ltd Semiconductor device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5177341A (en) * 1974-12-27 1976-07-05 Furukawa Electric Co Ltd GARASUHIKARIDENSOTAISOGONO SETSUZOKUHOHO
JPS5320945U (en) * 1976-07-30 1978-02-22
JPS5432075A (en) * 1977-08-15 1979-03-09 Nec Corp Semiconductor device
JPS5660024A (en) * 1979-10-22 1981-05-23 Hitachi Ltd Composite type semiconductor device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5320945B2 (en) * 1973-01-30 1978-06-29

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5177341A (en) * 1974-12-27 1976-07-05 Furukawa Electric Co Ltd GARASUHIKARIDENSOTAISOGONO SETSUZOKUHOHO
JPS5320945U (en) * 1976-07-30 1978-02-22
JPS5432075A (en) * 1977-08-15 1979-03-09 Nec Corp Semiconductor device
JPS5660024A (en) * 1979-10-22 1981-05-23 Hitachi Ltd Composite type semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01115183U (en) * 1988-01-28 1989-08-02
JPH0682862U (en) * 1991-03-14 1994-11-25 新電元工業株式会社 Bridge type semiconductor device
JP2009110981A (en) * 2007-10-26 2009-05-21 Mitsubishi Electric Corp Semiconductor module
JP2014072349A (en) * 2012-09-28 2014-04-21 Sanken Electric Co Ltd Semiconductor device
JP2014072350A (en) * 2012-09-28 2014-04-21 Sanken Electric Co Ltd Semiconductor device

Also Published As

Publication number Publication date
JPH0322925Y2 (en) 1991-05-20

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