JPS6161432B2 - - Google Patents

Info

Publication number
JPS6161432B2
JPS6161432B2 JP14276281A JP14276281A JPS6161432B2 JP S6161432 B2 JPS6161432 B2 JP S6161432B2 JP 14276281 A JP14276281 A JP 14276281A JP 14276281 A JP14276281 A JP 14276281A JP S6161432 B2 JPS6161432 B2 JP S6161432B2
Authority
JP
Japan
Prior art keywords
input
output
data
tag line
control device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP14276281A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5844524A (ja
Inventor
Masanobu Inoe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP14276281A priority Critical patent/JPS5844524A/ja
Publication of JPS5844524A publication Critical patent/JPS5844524A/ja
Publication of JPS6161432B2 publication Critical patent/JPS6161432B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/4226—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with asynchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
JP14276281A 1981-09-09 1981-09-09 入出力チヤネル装置 Granted JPS5844524A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14276281A JPS5844524A (ja) 1981-09-09 1981-09-09 入出力チヤネル装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14276281A JPS5844524A (ja) 1981-09-09 1981-09-09 入出力チヤネル装置

Publications (2)

Publication Number Publication Date
JPS5844524A JPS5844524A (ja) 1983-03-15
JPS6161432B2 true JPS6161432B2 (enrdf_load_html_response) 1986-12-25

Family

ID=15322984

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14276281A Granted JPS5844524A (ja) 1981-09-09 1981-09-09 入出力チヤネル装置

Country Status (1)

Country Link
JP (1) JPS5844524A (enrdf_load_html_response)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6054066A (ja) * 1983-09-02 1985-03-28 Fujitsu Ltd デ−タ転送チエツク方式

Also Published As

Publication number Publication date
JPS5844524A (ja) 1983-03-15

Similar Documents

Publication Publication Date Title
EP0009678B1 (en) Computer input/output apparatus
US4860244A (en) Buffer system for input/output portion of digital data processing system
US5664145A (en) Apparatus and method for transferring data in a data storage subsystems wherein a multi-sector data transfer order is executed while a subsequent order is issued
US5287486A (en) DMA controller using a programmable timer, a transfer counter and an or logic gate to control data transfer interrupts
JPS60134953A (ja) デ−タ転送制御装置
JPS6161432B2 (enrdf_load_html_response)
JPS634219B2 (enrdf_load_html_response)
JP3110024B2 (ja) メモリ制御システム
JP2963696B2 (ja) データ転送制御システム
JPS5936773B2 (ja) ロ−カルバ−スト転送制御方式
JPH0145657B2 (enrdf_load_html_response)
JPS63280364A (ja) デ−タ転送制御方式
JPS6019023B2 (ja) デ−タ処理装置
JPH042981B2 (enrdf_load_html_response)
JPS59139425A (ja) デ−タ転送制御方式
JPS599925B2 (ja) 優先処理方式
JPS6250848B2 (enrdf_load_html_response)
JPS61117651A (ja) インタ−フエイス装置
JPH0786852B2 (ja) Ｉ／ｏプロセッサのデータ転送方式
JPS61131154A (ja) デ−タ転送制御方式
JPS60181863A (ja) デ−タ処理装置
JPH04283848A (ja) データ転送制御方式
JPH0577090B2 (enrdf_load_html_response)
JPS5916036A (ja) 入出力制御装置
JPH0479022B2 (enrdf_load_html_response)