JPS6156879B2 - - Google Patents

Info

Publication number
JPS6156879B2
JPS6156879B2 JP11385078A JP11385078A JPS6156879B2 JP S6156879 B2 JPS6156879 B2 JP S6156879B2 JP 11385078 A JP11385078 A JP 11385078A JP 11385078 A JP11385078 A JP 11385078A JP S6156879 B2 JPS6156879 B2 JP S6156879B2
Authority
JP
Japan
Prior art keywords
photosensitive resist
metal film
pattern
forming
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP11385078A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5541708A (en
Inventor
Hikari Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHO ERU ESU AI GIJUTSU KENKYU KUMIAI
Original Assignee
CHO ERU ESU AI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHO ERU ESU AI GIJUTSU KENKYU KUMIAI filed Critical CHO ERU ESU AI GIJUTSU KENKYU KUMIAI
Priority to JP11385078A priority Critical patent/JPS5541708A/ja
Publication of JPS5541708A publication Critical patent/JPS5541708A/ja
Publication of JPS6156879B2 publication Critical patent/JPS6156879B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
JP11385078A 1978-09-16 1978-09-16 Method of fabricating multilayer circuit board Granted JPS5541708A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11385078A JPS5541708A (en) 1978-09-16 1978-09-16 Method of fabricating multilayer circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11385078A JPS5541708A (en) 1978-09-16 1978-09-16 Method of fabricating multilayer circuit board

Publications (2)

Publication Number Publication Date
JPS5541708A JPS5541708A (en) 1980-03-24
JPS6156879B2 true JPS6156879B2 (enrdf_load_stackoverflow) 1986-12-04

Family

ID=14622621

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11385078A Granted JPS5541708A (en) 1978-09-16 1978-09-16 Method of fabricating multilayer circuit board

Country Status (1)

Country Link
JP (1) JPS5541708A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0236984U (enrdf_load_stackoverflow) * 1988-09-06 1990-03-12

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3371592D1 (en) * 1983-06-01 1987-06-19 Ibm Deutschland Production method of printed circuits with one conductive layer
JPH0812720B2 (ja) * 1992-05-29 1996-02-07 東邦瓦斯株式会社 ガス遮断装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0236984U (enrdf_load_stackoverflow) * 1988-09-06 1990-03-12

Also Published As

Publication number Publication date
JPS5541708A (en) 1980-03-24

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