JPS6144452Y2 - - Google Patents

Info

Publication number
JPS6144452Y2
JPS6144452Y2 JP1980055566U JP5556680U JPS6144452Y2 JP S6144452 Y2 JPS6144452 Y2 JP S6144452Y2 JP 1980055566 U JP1980055566 U JP 1980055566U JP 5556680 U JP5556680 U JP 5556680U JP S6144452 Y2 JPS6144452 Y2 JP S6144452Y2
Authority
JP
Japan
Prior art keywords
bonding pad
semiconductor device
package
metal
grain size
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1980055566U
Other languages
English (en)
Japanese (ja)
Other versions
JPS56157743U (enExample
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1980055566U priority Critical patent/JPS6144452Y2/ja
Publication of JPS56157743U publication Critical patent/JPS56157743U/ja
Application granted granted Critical
Publication of JPS6144452Y2 publication Critical patent/JPS6144452Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • H10W72/07541Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07551Controlling the environment, e.g. atmosphere composition or temperature characterised by changes in properties of the bond wires during the connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/5363Shapes of wire connectors the connected ends being wedge-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/59Bond pads specially adapted therefor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • H10W72/932Plan-view shape, i.e. in top view
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)
JP1980055566U 1980-04-23 1980-04-23 Expired JPS6144452Y2 (enExample)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1980055566U JPS6144452Y2 (enExample) 1980-04-23 1980-04-23

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1980055566U JPS6144452Y2 (enExample) 1980-04-23 1980-04-23

Publications (2)

Publication Number Publication Date
JPS56157743U JPS56157743U (enExample) 1981-11-25
JPS6144452Y2 true JPS6144452Y2 (enExample) 1986-12-15

Family

ID=29650218

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1980055566U Expired JPS6144452Y2 (enExample) 1980-04-23 1980-04-23

Country Status (1)

Country Link
JP (1) JPS6144452Y2 (enExample)

Also Published As

Publication number Publication date
JPS56157743U (enExample) 1981-11-25

Similar Documents

Publication Publication Date Title
US3952404A (en) Beam lead formation method
TW419761B (en) Chip size package and method of fabricating the same
JPS6412095B2 (enExample)
US7095096B1 (en) Microarray lead frame
JPS6144452Y2 (enExample)
JPH07161919A (ja) 半導体装置およびその製造方法
JPS5895862A (ja) 積層構造半導体装置
JPS62136049A (ja) 半導体装置の製造方法
JPS58158951A (ja) 半導体パッケージの製造方法
JPH05283414A (ja) 半導体装置用金属配線のバンプ高さ制御装置
JPH0330986B2 (enExample)
JPH02308563A (ja) リードフレーム
JPS6141230Y2 (enExample)
JPH0430471A (ja) 半導体装置及びその製造方法
JPH0520902B2 (enExample)
JP2738070B2 (ja) ダイボンディング方法
JPS61141157A (ja) 半導体素子の製造方法
JPS61202444A (ja) 半導体装置の製造方法
JPS6254938A (ja) 半導体装置
JPS6031244A (ja) 半導体装置
JPS60170934A (ja) 半導体装置の製造方法
JPS58128731A (ja) 半導体素子電極形成方法
JPS58171834A (ja) レ−ザによる配線接続方法
WO1992011743A2 (en) An interconnect structure for connecting electronic devices
JPH05251564A (ja) 半導体装置の製造方法