JPS6143033A - デ−タ転送回路 - Google Patents

デ−タ転送回路

Info

Publication number
JPS6143033A
JPS6143033A JP59164523A JP16452384A JPS6143033A JP S6143033 A JPS6143033 A JP S6143033A JP 59164523 A JP59164523 A JP 59164523A JP 16452384 A JP16452384 A JP 16452384A JP S6143033 A JPS6143033 A JP S6143033A
Authority
JP
Japan
Prior art keywords
storage means
output
signal line
data
transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59164523A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0448012B2 (enrdf_load_stackoverflow
Inventor
Shigenori Takegawa
竹川 茂則
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP59164523A priority Critical patent/JPS6143033A/ja
Publication of JPS6143033A publication Critical patent/JPS6143033A/ja
Publication of JPH0448012B2 publication Critical patent/JPH0448012B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/423Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with synchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP59164523A 1984-08-06 1984-08-06 デ−タ転送回路 Granted JPS6143033A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59164523A JPS6143033A (ja) 1984-08-06 1984-08-06 デ−タ転送回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59164523A JPS6143033A (ja) 1984-08-06 1984-08-06 デ−タ転送回路

Publications (2)

Publication Number Publication Date
JPS6143033A true JPS6143033A (ja) 1986-03-01
JPH0448012B2 JPH0448012B2 (enrdf_load_stackoverflow) 1992-08-05

Family

ID=15794778

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59164523A Granted JPS6143033A (ja) 1984-08-06 1984-08-06 デ−タ転送回路

Country Status (1)

Country Link
JP (1) JPS6143033A (enrdf_load_stackoverflow)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5466010A (en) * 1977-11-05 1979-05-28 Fujitsu Ltd Time adjustment circuit
JPS595874A (ja) * 1982-06-21 1984-01-12 フラウド・コンサイン・リミテッド 燃料噴射のタイミングを決定する方法および装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5466010A (en) * 1977-11-05 1979-05-28 Fujitsu Ltd Time adjustment circuit
JPS595874A (ja) * 1982-06-21 1984-01-12 フラウド・コンサイン・リミテッド 燃料噴射のタイミングを決定する方法および装置

Also Published As

Publication number Publication date
JPH0448012B2 (enrdf_load_stackoverflow) 1992-08-05

Similar Documents

Publication Publication Date Title
JPS63228206A (ja) クロツク分配方式
JPH04312152A (ja) ネットワーク用入出力装置
JPS6143033A (ja) デ−タ転送回路
JP2001159970A (ja) 装置間結合装置
JPS6267654A (ja) デ−タ転送回路
JPS58181346A (ja) デ−タ多重化回路
JP2508322B2 (ja) シリアルi/o回路内臓マイクロコンピュ―タ
JPH0142016B2 (enrdf_load_stackoverflow)
JP2588042B2 (ja) データ処理回路
JPS596203U (ja) 中間値のアナログ信号選択回路
JPS60229156A (ja) 共有メモリ装置
JPH03174646A (ja) 伝播信号処理装置及びプロセッサシステム
JPH0758950B2 (ja) フレームアライナ回路
JPS61136400A (ja) タイムスロツト変換装置
JPH01256831A (ja) 送受信速度変換回路
JPH06223036A (ja) シリアル通信装置
JPH0287829A (ja) 並列直列変換器
JPS61286952A (ja) マルチi/0制御装置
JPS5829032A (ja) デ−タ転送方式
JPS60129871A (ja) 直列デ−タ転送回路
JPS6129242A (ja) 通信制御装置
JPS6316329A (ja) 演算装置のデ−タ送出回路
JPS60162325A (ja) 多重制御回路
JPH04274547A (ja) データ転送システム
JPS61285524A (ja) 論理回路出力伝送方式

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees