JPS61292342A - 多層配線構造体の製法 - Google Patents

多層配線構造体の製法

Info

Publication number
JPS61292342A
JPS61292342A JP60104035A JP10403585A JPS61292342A JP S61292342 A JPS61292342 A JP S61292342A JP 60104035 A JP60104035 A JP 60104035A JP 10403585 A JP10403585 A JP 10403585A JP S61292342 A JPS61292342 A JP S61292342A
Authority
JP
Japan
Prior art keywords
film
insulating layer
multilayer wiring
wiring
wiring structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60104035A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0247102B2 (enrdf_load_stackoverflow
Inventor
Shunichi Fukuyama
俊一 福山
Yasuhiro Yoneda
泰博 米田
Masashi Miyagawa
昌士 宮川
Kota Nishii
耕太 西井
Azuma Matsuura
東 松浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP60104035A priority Critical patent/JPS61292342A/ja
Priority to US06/790,615 priority patent/US4670299A/en
Priority to KR1019850007985A priority patent/KR880000853B1/ko
Priority to EP19850307905 priority patent/EP0198976B1/en
Priority to EP19900114892 priority patent/EP0406911B1/en
Priority to DE90114892T priority patent/DE3587442T2/de
Priority to DE8585307905T priority patent/DE3587041T2/de
Publication of JPS61292342A publication Critical patent/JPS61292342A/ja
Priority to KR1019870014659A priority patent/KR900005894B1/ko
Priority to US07/281,926 priority patent/US4988514A/en
Publication of JPH0247102B2 publication Critical patent/JPH0247102B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02137—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material comprising alkyl silsesquioxane, e.g. MSQ
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
JP60104035A 1984-11-01 1985-05-17 多層配線構造体の製法 Granted JPS61292342A (ja)

Priority Applications (9)

Application Number Priority Date Filing Date Title
JP60104035A JPS61292342A (ja) 1985-05-17 1985-05-17 多層配線構造体の製法
US06/790,615 US4670299A (en) 1984-11-01 1985-10-23 Preparation of lower alkyl polysilsesquioxane and formation of insulating layer of silylated polymer on electronic circuit board
KR1019850007985A KR880000853B1 (ko) 1984-11-01 1985-10-29 저급알킬 폴리실세스퀴옥산의 제조방법
DE90114892T DE3587442T2 (de) 1984-11-01 1985-10-31 Verfahren zur Herstellung von Polysilsesquioxanen.
EP19900114892 EP0406911B1 (en) 1984-11-01 1985-10-31 Process for preparation of polysilsesquioxane
EP19850307905 EP0198976B1 (en) 1984-11-01 1985-10-31 Process for formation of insulating layer of silylated polysilsesquioxane on electronic circuit board
DE8585307905T DE3587041T2 (de) 1984-11-01 1985-10-31 Verfahren zur herstellung von isolatorschichten aus silylierten polysilsesquioxanen auf elektronischen gedruckten schaltung.
KR1019870014659A KR900005894B1 (ko) 1984-11-01 1987-12-21 표면이 평평한 절연층의 형성방법
US07/281,926 US4988514A (en) 1984-11-01 1988-12-02 Preparation of lower alkyl polysilsesquioxane and formation of insulating layer of silylated polymer on electronic circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60104035A JPS61292342A (ja) 1985-05-17 1985-05-17 多層配線構造体の製法

Publications (2)

Publication Number Publication Date
JPS61292342A true JPS61292342A (ja) 1986-12-23
JPH0247102B2 JPH0247102B2 (enrdf_load_stackoverflow) 1990-10-18

Family

ID=14369970

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60104035A Granted JPS61292342A (ja) 1984-11-01 1985-05-17 多層配線構造体の製法

Country Status (1)

Country Link
JP (1) JPS61292342A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6838124B2 (en) 1999-10-18 2005-01-04 Honeywell International Inc. Deposition of fluorosilsesquioxane films
US6914114B2 (en) 2000-07-17 2005-07-05 Honeywell International Inc. Absorbing compounds for spin-on-glass anti-reflective coatings for photolithography
US8992806B2 (en) 2003-11-18 2015-03-31 Honeywell International Inc. Antireflective coatings for via fill and photolithography applications and methods of preparation thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6838124B2 (en) 1999-10-18 2005-01-04 Honeywell International Inc. Deposition of fluorosilsesquioxane films
US6914114B2 (en) 2000-07-17 2005-07-05 Honeywell International Inc. Absorbing compounds for spin-on-glass anti-reflective coatings for photolithography
US8992806B2 (en) 2003-11-18 2015-03-31 Honeywell International Inc. Antireflective coatings for via fill and photolithography applications and methods of preparation thereof

Also Published As

Publication number Publication date
JPH0247102B2 (enrdf_load_stackoverflow) 1990-10-18

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