JPS61253918A - 論理回路 - Google Patents

論理回路

Info

Publication number
JPS61253918A
JPS61253918A JP60094856A JP9485685A JPS61253918A JP S61253918 A JPS61253918 A JP S61253918A JP 60094856 A JP60094856 A JP 60094856A JP 9485685 A JP9485685 A JP 9485685A JP S61253918 A JPS61253918 A JP S61253918A
Authority
JP
Japan
Prior art keywords
gate
input
output
flip
gates
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60094856A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0317413B2 (enExample
Inventor
Takanori Sugihara
杉原　誉則
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP60094856A priority Critical patent/JPS61253918A/ja
Priority to US06/857,016 priority patent/US4736395A/en
Priority to KR1019860003366A priority patent/KR900000995B1/ko
Priority to DE8686303323T priority patent/DE3684955D1/de
Priority to EP86303323A priority patent/EP0201287B1/en
Publication of JPS61253918A publication Critical patent/JPS61253918A/ja
Publication of JPH0317413B2 publication Critical patent/JPH0317413B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318541—Scan latches or cell details
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H03K3/0375—Bistable circuits provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Logic Circuits (AREA)
JP60094856A 1985-05-02 1985-05-02 論理回路 Granted JPS61253918A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP60094856A JPS61253918A (ja) 1985-05-02 1985-05-02 論理回路
US06/857,016 US4736395A (en) 1985-05-02 1986-04-29 Logic circuit having a test data loading function
KR1019860003366A KR900000995B1 (ko) 1985-05-02 1986-04-30 테스트 데이타 부하 기능을 갖춘 논리회로
DE8686303323T DE3684955D1 (de) 1985-05-02 1986-05-01 Testdaten-ladefunktion aufweisende logikschaltung.
EP86303323A EP0201287B1 (en) 1985-05-02 1986-05-01 Logic circuit having a test data loading function

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60094856A JPS61253918A (ja) 1985-05-02 1985-05-02 論理回路

Publications (2)

Publication Number Publication Date
JPS61253918A true JPS61253918A (ja) 1986-11-11
JPH0317413B2 JPH0317413B2 (enExample) 1991-03-08

Family

ID=14121672

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60094856A Granted JPS61253918A (ja) 1985-05-02 1985-05-02 論理回路

Country Status (5)

Country Link
US (1) US4736395A (enExample)
EP (1) EP0201287B1 (enExample)
JP (1) JPS61253918A (enExample)
KR (1) KR900000995B1 (enExample)
DE (1) DE3684955D1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2659095B2 (ja) * 1987-06-30 1997-09-30 富士通株式会社 ゲートアレイ及びメモリを有する半導体集積回路装置
US4860325A (en) * 1988-06-24 1989-08-22 Advanced Micro Devices, Inc. Counter tester
US4979193A (en) * 1989-04-26 1990-12-18 Advanced Micro Devices, Inc. Method and apparatus for testing a binary counter
JP2632731B2 (ja) * 1989-08-02 1997-07-23 三菱電機株式会社 集積回路装置
US5185769A (en) * 1991-10-15 1993-02-09 Acer Incorporated Easily testable high speed digital counter
EP0541840B1 (en) * 1991-11-11 1993-07-14 Hewlett-Packard GmbH Formatter circuit

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3458825A (en) * 1966-02-17 1969-07-29 Philips Corp Bistable trigger circuit comprising two relatively complementary outputs and two inputs and a clock pulse input
DE1255715B (de) * 1966-08-12 1967-12-07 Philips Patentverwaltung Bistabile Kippstufe mit mehr als zwei verschiedenartigen Bedingungs-Eingaengen
DE1537298B2 (de) * 1967-10-21 1975-06-12 Philips Patentverwaltung Gmbh, 2000 Hamburg Bistabile Kippstufe mit Vielfacheingängen
US3878405A (en) * 1972-07-13 1975-04-15 Teradyne Inc Switching circuitry for logical testing of network connections
US4001553A (en) * 1975-09-17 1977-01-04 Rockwell International Corporation Counter arrangement and associated test circuit for an electronic timing device
GB2030807B (en) * 1978-10-02 1982-11-10 Ibm Latch circuit
JPS5668033A (en) * 1979-11-09 1981-06-08 Fujitsu Ltd Logic circuit
JPS609221A (ja) * 1983-06-28 1985-01-18 Sharp Corp テスト機能付分周回路
US4627085A (en) * 1984-06-29 1986-12-02 Applied Micro Circuits Corporation Flip-flop control circuit

Also Published As

Publication number Publication date
EP0201287A3 (en) 1989-06-14
JPH0317413B2 (enExample) 1991-03-08
EP0201287B1 (en) 1992-04-22
KR900000995B1 (ko) 1990-02-23
US4736395A (en) 1988-04-05
KR860009550A (ko) 1986-12-23
DE3684955D1 (de) 1992-05-27
EP0201287A2 (en) 1986-11-12

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