JPS61252699A - 多層配線板の製造方法 - Google Patents

多層配線板の製造方法

Info

Publication number
JPS61252699A
JPS61252699A JP9365385A JP9365385A JPS61252699A JP S61252699 A JPS61252699 A JP S61252699A JP 9365385 A JP9365385 A JP 9365385A JP 9365385 A JP9365385 A JP 9365385A JP S61252699 A JPS61252699 A JP S61252699A
Authority
JP
Japan
Prior art keywords
wiring board
multilayer wiring
conductor
melting point
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9365385A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0482080B2 (enrdf_load_stackoverflow
Inventor
修 宮沢
明 富沢
中 横野
稔 田中
旻 村田
房次 庄子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9365385A priority Critical patent/JPS61252699A/ja
Publication of JPS61252699A publication Critical patent/JPS61252699A/ja
Publication of JPH0482080B2 publication Critical patent/JPH0482080B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
JP9365385A 1985-05-02 1985-05-02 多層配線板の製造方法 Granted JPS61252699A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9365385A JPS61252699A (ja) 1985-05-02 1985-05-02 多層配線板の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9365385A JPS61252699A (ja) 1985-05-02 1985-05-02 多層配線板の製造方法

Publications (2)

Publication Number Publication Date
JPS61252699A true JPS61252699A (ja) 1986-11-10
JPH0482080B2 JPH0482080B2 (enrdf_load_stackoverflow) 1992-12-25

Family

ID=14088337

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9365385A Granted JPS61252699A (ja) 1985-05-02 1985-05-02 多層配線板の製造方法

Country Status (1)

Country Link
JP (1) JPS61252699A (enrdf_load_stackoverflow)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5013938A (enrdf_load_stackoverflow) * 1973-06-08 1975-02-13
JPS5028662A (enrdf_load_stackoverflow) * 1973-07-17 1975-03-24
JPS5032561U (enrdf_load_stackoverflow) * 1973-07-17 1975-04-09
JPS544375A (en) * 1977-06-13 1979-01-13 Suwa Seikosha Kk Circuit substrate
JPS5446376A (en) * 1977-09-20 1979-04-12 Fujitsu Ltd Method of manufacturing multilayer printed board
JPS56150897A (en) * 1980-04-23 1981-11-21 Fujitsu Ltd Method of manufacturing multilayer printed board
JPS57109392A (en) * 1980-12-26 1982-07-07 Suwa Seikosha Kk Circuit mounting substrate
JPS58143559A (ja) * 1982-02-19 1983-08-26 Matsushita Electric Ind Co Ltd 多層構造半導体集積回路装置およびその製造方法

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5013938A (enrdf_load_stackoverflow) * 1973-06-08 1975-02-13
JPS5028662A (enrdf_load_stackoverflow) * 1973-07-17 1975-03-24
JPS5032561U (enrdf_load_stackoverflow) * 1973-07-17 1975-04-09
JPS544375A (en) * 1977-06-13 1979-01-13 Suwa Seikosha Kk Circuit substrate
JPS5446376A (en) * 1977-09-20 1979-04-12 Fujitsu Ltd Method of manufacturing multilayer printed board
JPS56150897A (en) * 1980-04-23 1981-11-21 Fujitsu Ltd Method of manufacturing multilayer printed board
JPS57109392A (en) * 1980-12-26 1982-07-07 Suwa Seikosha Kk Circuit mounting substrate
JPS58143559A (ja) * 1982-02-19 1983-08-26 Matsushita Electric Ind Co Ltd 多層構造半導体集積回路装置およびその製造方法

Also Published As

Publication number Publication date
JPH0482080B2 (enrdf_load_stackoverflow) 1992-12-25

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