JPS61248603A - Sampling phase comparator circuit - Google Patents
Sampling phase comparator circuitInfo
- Publication number
- JPS61248603A JPS61248603A JP60090104A JP9010485A JPS61248603A JP S61248603 A JPS61248603 A JP S61248603A JP 60090104 A JP60090104 A JP 60090104A JP 9010485 A JP9010485 A JP 9010485A JP S61248603 A JPS61248603 A JP S61248603A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- phase
- pulse
- transmission line
- reference signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Description
【発明の詳細な説明】
〔概要〕
超高周波帯用位相同期発振器に使用するサンプリング位
相比較回路において、基準信号に同期したパルスを発生
するダイオードと、このパルスと被サンプリグ信号との
位相を比較する位相比較用素子とを結ぶ伝送線路にスタ
ブを並列接続する事により、より高い周波数で実用にな
るものが得られた。[Detailed Description of the Invention] [Summary] In a sampling phase comparison circuit used in a phase-locked oscillator for an ultra-high frequency band, a diode that generates a pulse synchronized with a reference signal and a phase of this pulse and a sampled signal are compared. By connecting stubs in parallel to the transmission line connecting the phase comparison element, we were able to obtain a device that can be used at higher frequencies.
本発明は、超高周波帯用位相同期発振器に使用するサン
プリング位相比較回路の改良に関するものである。The present invention relates to an improvement in a sampling phase comparator circuit used in a phase-locked oscillator for ultra-high frequency bands.
一般に、超高周波帯で用いられる位相同期発振回路の構
成要素として超高周波帯の発振器2位相比較回路、低域
通過型フィルタや位相同期が外れた時にこれを検出して
再同期を取る回路等があるが、個々の回路の特性が良好
でしかも安定でなければ位相同期発振器として充分な機
能を発揮する事ができない。Generally, the components of a phase-locked oscillation circuit used in an ultra-high frequency band include an ultra-high frequency band oscillator two-phase comparator circuit, a low-pass filter, and a circuit that detects when phase synchronization is lost and resynchronizes it. However, unless the characteristics of each individual circuit are good and stable, it cannot function adequately as a phase-locked oscillator.
一方、使用周波数は年々高くなっているので、なるべく
高い周波数迄動作する位相比較回路が必要となる。On the other hand, since the frequencies used are increasing year by year, a phase comparator circuit that operates up to as high a frequency as possible is required.
第5図はサンプリング位相比較回路の従来例の回路図を
、第6図は第5図の波形図を示す。FIG. 5 shows a circuit diagram of a conventional example of a sampling phase comparison circuit, and FIG. 6 shows a waveform diagram of FIG.
尚、第6図の左側の数字は第5図の同じ番号の波形を示
す。Note that the numbers on the left side of FIG. 6 indicate the waveforms with the same numbers in FIG.
そこで、第6図を参照して第5図の動作を説明する。Therefore, the operation shown in FIG. 5 will be explained with reference to FIG.
第5図において、端子lN−1に加えられた例えば数1
0〜数100 Mllzの基準信号は、トランス1を介
してダイオード(例えば、ステップリカバリダイオード
)2に加えられ基準信号に同期した正及び負のパルスが
得られ(第6図−■は正のパルスのみを示している)、
このパルスは位相比較用素子(例えば、ショットキーバ
リアダイオード)3−1及び3−2に加えられる。In FIG. 5, for example, the number 1 is applied to the terminal lN-1.
A reference signal of 0 to several 100 Mllz is applied to a diode (for example, a step recovery diode) 2 via a transformer 1, and positive and negative pulses synchronized with the reference signal are obtained (Figure 6 - ■ is a positive pulse). (only shown),
This pulse is applied to phase comparison elements (eg, Schottky barrier diodes) 3-1 and 3-2.
一方、端子lN−2より被サンプリング信号として数G
Hz程度程度部高周波信号が位相比較用素子3−1.3
−2に加えられるが、前記のパルスによって第6図−■
に示す様にサンプリングされて基準信号と被サンプリン
グ信号との位相差に対応する出力電圧(第6図−■の一
点鎖線の部分)が端子011Tより取出される(第3図
の従来例参照)。On the other hand, from terminal lN-2, several G
A high frequency signal of approximately Hz is detected by the phase comparison element 3-1.3.
-2, but due to the above-mentioned pulses, Fig. 6-■
As shown in Fig. 6, the output voltage corresponding to the phase difference between the reference signal and the sampled signal (the part indicated by the dashed dotted line in Fig. 6) is taken out from the terminal 011T (see the conventional example in Fig. 3). .
ここで、2つの信号の位相が同期していれば、被サンプ
リング信号の同し点がサンプリングされるので一定の出
力電圧が得られるが、非同期の場合はサンプリング点が
ずれるので出力電圧が変化する。そこで、この電圧が一
定になる様に被サンプリング信号の位相を制御して基準
信号に同期さり(以下PETと省略する)4を用いたも
ので、不平衡状態になっているが基本的な動作は第5図
と全く同一である。Here, if the phases of the two signals are synchronized, the same points of the sampled signal are sampled, so a constant output voltage can be obtained, but if they are asynchronous, the sampling points are shifted, so the output voltage changes. . Therefore, the phase of the sampled signal is controlled and synchronized with the reference signal so that this voltage becomes constant. is exactly the same as in FIG.
ここで、+Vd、 −vgはPETの電源を示す。Here, +Vd and -vg indicate the power supply of PET.
尚、このサンプリング位相比較回路は例えば約6X7m
mのアルミナ基板の上にチップ部品やストリップライン
を用いて形成されているが、上記のパルス波形が変化し
たり、不要な共振を起こして出力電圧の低下しない様に
各回路素子間及び伝送線路の長さは極力短くしている。Note that this sampling phase comparator circuit has a size of approximately 6 x 7 m, for example.
It is formed using chip parts and strip lines on an alumina substrate of M, but in order to prevent the above pulse waveform from changing or causing unnecessary resonance and reducing the output voltage, there are special connections between each circuit element and the transmission line. The length is kept as short as possible.
しかし、このサンプリング位相比較回路は第3図の従来
例に示す様に、被サンプリング信号の周波数が約10G
llzより高くなると出力電圧が少なくなり20〜25
GIIz帯では実用にならないと云う問題点がある。However, as shown in the conventional example in Fig. 3, this sampling phase comparison circuit has a frequency of about 10G.
When the voltage is higher than llz, the output voltage decreases and becomes 20 to 25.
There is a problem that it is not practical in the GIIz band.
上記の問題点は、第1図の原理ブロック図に示す様にダ
イオード2と位相比較用素子3とを接続する第1の伝送
線路5とアースとの間に第2の伝送線路6を接続した本
発明のサンプリング位相比較回路により解決される。The above problem can be solved by connecting the second transmission line 6 between the first transmission line 5 connecting the diode 2 and the phase comparison element 3 and the ground as shown in the principle block diagram of FIG. This problem is solved by the sampling phase comparison circuit of the present invention.
本発明は、第1の伝送線路とアースとの間に第2の伝送
線路を接続する様にした。In the present invention, the second transmission line is connected between the first transmission line and ground.
これにより、ステップリカバリダイオードで発生したパ
ルス波形がより鋭くなり、出力電圧が大きくなると共に
、被サンプリング信号の周波数が約20〜25 G H
zでも位相比較器として充分動作する様になった。As a result, the pulse waveform generated by the step recovery diode becomes sharper, the output voltage becomes larger, and the frequency of the sampled signal increases to approximately 20 to 25 GH.
Even z can now function satisfactorily as a phase comparator.
第2図はサンプリング位相比較回路の本発明の実施例の
回路図を示す。FIG. 2 shows a circuit diagram of an embodiment of the present invention of a sampling phase comparison circuit.
図において、第2の伝送線路6−1 、6−2の構造は
例えば幅が0.1mで長さが約1.5〜2.5 mmの
線路で、一端が第1の伝送線路5−1.5−2に接続さ
れ、他端はアースされている。この時、上記のパルス幅
は従来に比して狭く、波形も急峻になり端子OUTより
得られる出力電圧も増加する。In the figure, the structure of the second transmission lines 6-1 and 6-2 is, for example, a line with a width of 0.1 m and a length of about 1.5 to 2.5 mm, with one end connected to the first transmission line 5-2. 1.5-2, and the other end is grounded. At this time, the above-mentioned pulse width is narrower than in the conventional case, the waveform becomes steeper, and the output voltage obtained from the terminal OUT also increases.
尚、長さを略0にするとパルスの波高値が極端に小さく
なって出力電圧は著しく低下しすると云う事が実験的に
得られた。It has been experimentally found that when the length is set to approximately 0, the peak value of the pulse becomes extremely small and the output voltage drops significantly.
第3図は第2図の実測データを示し、基準信号は100
MHzで入力電圧は+17dBm 、被サンプリング信
号の入力電力は−7dBmのときの出力電圧と被サンプ
リング周波数の関係を示す。Figure 3 shows the measured data in Figure 2, and the reference signal is 100
The relationship between the output voltage and the sampled frequency is shown when the input voltage is +17 dBm at MHz and the input power of the sampled signal is -7 dBm.
図に示す様に、従来に比して出力電圧が増加し、且つ滑
らかな曲線となっているので共振による影響は見られず
、約20〜25GHz迄は位相比較器として充分動作す
る。As shown in the figure, the output voltage is increased compared to the conventional one, and the curve is smooth, so there is no effect of resonance, and the device operates satisfactorily as a phase comparator up to about 20 to 25 GHz.
第4図は本発明の別の実施例の回路図を示す。FIG. 4 shows a circuit diagram of another embodiment of the invention.
図に示す様に、位相比較用素子としてFET 4を使用
しているので伝送線路5−3及び第2の伝送線路6−3
は1つとなる。しかし、第2図の場合と同様に約20〜
25Gl(z迄は充分動作する。As shown in the figure, since FET 4 is used as a phase comparison element, transmission line 5-3 and second transmission line 6-3
becomes one. However, as in the case of Fig. 2, about 20~
25Gl (works well up to z).
以上詳細に説明した様に、被サンプリング信号の周波数
が約20〜25GH2迄実用になるサンプリング位相比
較回路が得られたと云う効果がある。As described in detail above, there is an effect that a sampling phase comparator circuit that can be used practically up to the frequency of the sampled signal of approximately 20 to 25 GH2 has been obtained.
第1図は本発明の原理ブロック図、
第2図は本発明の実施例の回路図、
第3図は本発明及び従来例の出力電圧の比較図、第4図
は本発明の別の実施例の回路図、第5図は従来例の回路
図、
第6図は第1図の動作波形図、
第7図は従来例の別の回路図を示す。
図において、
2はダイオード、
3 、3−1.3−2.4は位相比較用素子、5 、5
−1.5−2.5−3は第1の伝送線路、6 、6−1
.6−2.6−3は第2の伝送線路を示す。
′し
、\
堵
O\Fig. 1 is a principle block diagram of the present invention, Fig. 2 is a circuit diagram of an embodiment of the present invention, Fig. 3 is a comparison diagram of output voltages of the present invention and a conventional example, and Fig. 4 is another embodiment of the present invention. FIG. 5 is a circuit diagram of the conventional example, FIG. 6 is an operating waveform diagram of FIG. 1, and FIG. 7 is another circuit diagram of the conventional example. In the figure, 2 is a diode, 3, 3-1.3-2.4 is a phase comparison element, 5, 5
-1.5-2.5-3 is the first transmission line, 6, 6-1
.. 6-2.6-3 indicates the second transmission line. 'Shi, \ TOO\
Claims (1)
したパルスを発生させ、該パルスと被サンプリング信号
とを位相比較用素子(3)に加え、該基準信号と被サン
プリング信号との位相差に対応する出力を得るサンプリ
ング位相比較回路において、該ダイオード(2)と該位
相比較用素子(3)とを接続する第1の伝送線路(5)
とアースとの間に第2の伝送線路(6)を接続した事を
特徴とするサンプリング位相比較回路。A reference signal is added to a diode (2) to generate a pulse synchronized with the reference signal, and the pulse and the sampled signal are added to a phase comparison element (3) to calculate the phase difference between the reference signal and the sampled signal. A first transmission line (5) connecting the diode (2) and the phase comparison element (3) in a sampling phase comparison circuit that obtains an output corresponding to
A sampling phase comparator circuit characterized in that a second transmission line (6) is connected between the ground and the ground.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60090104A JPS61248603A (en) | 1985-04-26 | 1985-04-26 | Sampling phase comparator circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60090104A JPS61248603A (en) | 1985-04-26 | 1985-04-26 | Sampling phase comparator circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61248603A true JPS61248603A (en) | 1986-11-05 |
Family
ID=13989209
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60090104A Pending JPS61248603A (en) | 1985-04-26 | 1985-04-26 | Sampling phase comparator circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61248603A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04130803A (en) * | 1990-09-21 | 1992-05-01 | Nec Corp | Sampling phase comparator |
-
1985
- 1985-04-26 JP JP60090104A patent/JPS61248603A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04130803A (en) * | 1990-09-21 | 1992-05-01 | Nec Corp | Sampling phase comparator |
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