JPS5828785B2 - frequency multiplier - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a frequency multiplier-ζ that multiplies the frequency of alternating current, and particularly relates to a frequency multiplier that converts an input alternating current frequency into a pulse train of four times or less frequency.

Conventionally, frequency multipliers include (1) a method of extracting harmonic components contained in an input signal using an LC resonant circuit, (2) a method of controlling the oscillation station frequency of a multiplication frequency oscillator using an input AC signal, and (3) a method of controlling the oscillation station frequency of a multiplication frequency oscillator using an input AC signal. As shown in FIG.
and 81 are delayed by 1/4 time T of the input AC cycle in the delay circuit 12 to obtain the signal S2, and the signal 81 and S2 are passed through the exclusive OR circuit 13 to obtain the signal S3. be.

However, there are drawbacks as described below. In (1), the components of the LC resonant circuit become large in the region where the input AC frequency is low, which is uneconomical.

Furthermore, if the input signal has few harmonic components, it becomes necessary to separately distort the waveform.

(In '4', the oscillator used may malfunction due to external noise, resulting in an error in the multiplier.

In any of the cases (1) to (3), it is necessary to adjust the resonance frequency and the oscillation frequency delay time, respectively, in response to changes in the frequency of the input AC.

The present invention aims to eliminate the above-mentioned drawbacks and provide a frequency multiplier that has a simple structure, can be multiplied over a relatively wide range of frequencies without adjustment, operates stably, is compact, and is inexpensive.

An embodiment of the present invention will be described in detail below with reference to the accompanying drawings.

In Figure 2, 1 is an input signal, 2 is a phase shift circuit that shifts the phase of the input signal to the lag side by 45 electrical degrees, 3 is a full-wave rectifier circuit that full-wave rectifies the phase-shifted input signal, and 4 is a full-wave rectifier circuit that performs full-wave rectification of the phase-shifted input signal. A level detection circuit that detects the level of the input electrical quantity from the wave rectifier circuit 3 at a predetermined value, 5 is a level detection circuit that detects the level of the input electrical quantity from the wave rectifier circuit 3,
° A phase shift circuit that shifts the phase to the leading side, 3' is a full-wave rectifier circuit similar to 3, 4' is a level detection circuit similar to 4, and 6 is a logical OR that takes the logical sum of level detection circuits 4 and 4'. It is a circuit.

Next, the operation of the present invention configured as described above will be explained using the time chart shown in FIG.

When the input signal e shown in FIG. 3 is applied to the delayed phase shift circuit 2 shown in FIG. 2, the delayed phase shift circuit 2 produces a signal 1 delayed by θ1 as shown in FIG.

This signal v1 delayed by θ1 is full-wave rectified by the rectifier circuit 3, resulting in the signal shown in FIG. 3, and the level is detected by the level detection circuit 4 having a detection level of vL, resulting in the signal shown in FIG. 3, 6.

Next, the input signal e in FIG. 3 is applied to the advance phase shift circuit 5 in FIG. 2 in the same manner as in the first circuit, and as shown in FIG.
The signal v2 is advanced by θ2.

This θ2 lead signal is also rectified and level detected by the same rectifier circuit 3' and level detection circuit 4' as shown in FIG.
The output is

The outputs 6.7 of the level detection circuits 4 and 4' are combined by the logic circuit 6, resulting in the output shown in FIG. 3, and a square wave output obtained by multiplying the input signal frequency by 4 can be obtained.

Furthermore, the phase difference between the delayed signal v1 and the advanced signal V2 (θ1+θ
By keeping 2) at 90 degrees, the fundamental wave of the output pulse has a period four times that of the input, making it possible to obtain a more accurate output.

For example, a resistor R and a capacitor C as shown in FIG.
By using a simple phase shift circuit, it is possible to maintain the phase difference at 90 degrees regardless of the input frequency, and it is possible to obtain a quadrupled frequency output with little error in a wide frequency band.

Furthermore, the detection level V of the level detection circuits 4 and 4' in FIG.
By varying L, the "1" time width t1 and the 0" time width t of the square wave output shown in FIG.

can change the ratio of t1/(i1+to
) can also be used to obtain a constant square wave output.

The present invention is not limited to the embodiments described above, but includes an off-delay circuit 1 that delays the output of the OR circuit 6 of FIG.
The multiplier circuit shown in FIG. 6 may also be used.

In this case, the average output of the multiplied output waveform changes depending on the frequency of the input signal, but the waveform of the input signal is distorted to the detection level VLIJF of the level detection circuits 4 and 4' as shown in FIG. It is effective as a countermeasure in such cases, and when an erroneous output occurs as shown in Fig. 7 6, the detection level is set to vL2 in Fig. 1 4 to prevent the erroneous output.
After obtaining the output, the delay circuit γ causes "1" as shown in FIG.
``It is possible to compensate for the output time width to be the same as tl and fO in FIG. 16 by delaying the output width by T time.

Also, a frequency divider circuit 8 that divides the output of the OR circuit 6 in FIG.
The multiplier circuit shown in FIG. 8 may be used.

In this case, the frequency dividing number of the frequency dividing circuit 8 is 4/n (however, n=
1, 2, 3. ...) It becomes possible to obtain a multiplied output.

The same effect can be obtained by connecting the frequency divider circuit 8 to the output of the delay circuit shown in FIG.

Furthermore, if the input signal is from a commercial power supply, for example, and the input signal waveform is considerably distorted as shown in FIG. Filter 9 that suppresses and prevents noise, surge, etc.
A multiplier circuit may also be used.

As described above, according to the present invention, it is possible to multiply the input signal frequency by 4 times or less with high accuracy in a wide input signal frequency band with a simple configuration, and even if the input signal has waveform distortion, it is possible to multiply the input signal frequency by 4 times or less. It can be multiplied without any problem.

Furthermore, even if the input frequency fluctuates, there is no particular need for adjustment.

Furthermore, since it is possible to change the average output level, it is possible to obtain an output according to the purpose of use, and since it is a logical output, it is easy to connect to a system after the multiplier.

[Brief explanation of drawings]

Fig. 1 a, t) shows a conventional embodiment, Fig. 2 shows an embodiment of the present invention, Fig. 3 is a time chart showing the operation of Fig. 2, Fig. 4 is a vector diagram showing the state of the main part of FIG. 2, FIG. 5 is a diagram showing a configuration example of the phase shift circuit of FIG. 2, and FIGS. 6, 8, and 9 are diagrams showing other embodiments of the present invention. A diagram showing an example, FIG. 1 is a time chart for showing the operations of FIG. 6 and FIGS. 9a and 9b. 1... Input signal, 2... Delayed phase shift circuit, 3, 3'... Rectifier circuit, 4, 4'...
・Level detection circuit, 5... Advance phase shift circuit, 6.
...Order circuit.

Claims (1)

[Claims] 1. A first phase shift circuit that shifts the phase of a human-powered AC signal by an arbitrary electrical angle, a fourth full-wave rectifier circuit that full-wave rectifies this phase-shifted signal, and detects the level of this rectified signal and detects the level near the zero point. a first level detection circuit that outputs a pulse from the input AC signal; and a second phase shift circuit that shifts the input AC signal so as to have a phase difference of 90 electrical degrees with respect to the phase shift angle of the first phase shift circuit. a second full-wave rectifier circuit that performs full-wave rectification of this phase-shifted signal; a second level detection circuit that detects the level of this rectified signal and outputs a pulse from near the zero point; A frequency multiplier consisting of a logic circuit that inputs the output pulses of the level detection circuit and obtains the logical sum of the output pulses.