JPS61245731A - 同期補正回路 - Google Patents
同期補正回路Info
- Publication number
- JPS61245731A JPS61245731A JP60088426A JP8842685A JPS61245731A JP S61245731 A JPS61245731 A JP S61245731A JP 60088426 A JP60088426 A JP 60088426A JP 8842685 A JP8842685 A JP 8842685A JP S61245731 A JPS61245731 A JP S61245731A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- phase difference
- transmission clock
- counter
- ftcp
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005540 biological transmission Effects 0.000 claims abstract description 34
- 230000001360 synchronised effect Effects 0.000 claims abstract description 5
- 238000001514 detection method Methods 0.000 claims description 8
- 230000001934 delay Effects 0.000 claims description 2
- MXFYUGSDGTUVEP-UHFFFAOYSA-N 4-fluoro-1-(1-thiophen-2-ylcyclohexyl)piperidine Chemical compound C1CC(F)CCN1C1(C=2SC=CC=2)CCCCC1 MXFYUGSDGTUVEP-UHFFFAOYSA-N 0.000 abstract description 16
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 6
- 230000000630 rising effect Effects 0.000 description 4
- 102100038023 DNA fragmentation factor subunit beta Human genes 0.000 description 2
- 101100277639 Homo sapiens DFFB gene Proteins 0.000 description 2
- 230000003111 delayed effect Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000013307 optical fiber Substances 0.000 description 1
Landscapes
- Small-Scale Networks (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60088426A JPS61245731A (ja) | 1985-04-24 | 1985-04-24 | 同期補正回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60088426A JPS61245731A (ja) | 1985-04-24 | 1985-04-24 | 同期補正回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61245731A true JPS61245731A (ja) | 1986-11-01 |
| JPH0320177B2 JPH0320177B2 (enrdf_load_stackoverflow) | 1991-03-18 |
Family
ID=13942455
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60088426A Granted JPS61245731A (ja) | 1985-04-24 | 1985-04-24 | 同期補正回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61245731A (enrdf_load_stackoverflow) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0220939A (ja) * | 1988-07-08 | 1990-01-24 | Toshiba Corp | ループネットワークのループ制御方式 |
| US4943857A (en) * | 1987-04-24 | 1990-07-24 | Hitachi, Ltd. | Synchronizing circuit for an external signal and an internal sampling clock signal |
| JPH04215341A (ja) * | 1990-12-13 | 1992-08-06 | Sumitomo Electric Ind Ltd | データの受信タイミング補正装置 |
| JPH0750683A (ja) * | 1991-04-29 | 1995-02-21 | At & T Corp | 通信ネットワークと周波数同期確立方法 |
| US9654114B2 (en) | 2014-10-06 | 2017-05-16 | Socionext Inc. | Transmission circuit, integrated circuit, and parallel-to-serial conversion method |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55127745A (en) * | 1979-03-26 | 1980-10-02 | Hitachi Denshi Ltd | Bit buffer system |
-
1985
- 1985-04-24 JP JP60088426A patent/JPS61245731A/ja active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55127745A (en) * | 1979-03-26 | 1980-10-02 | Hitachi Denshi Ltd | Bit buffer system |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4943857A (en) * | 1987-04-24 | 1990-07-24 | Hitachi, Ltd. | Synchronizing circuit for an external signal and an internal sampling clock signal |
| JPH0220939A (ja) * | 1988-07-08 | 1990-01-24 | Toshiba Corp | ループネットワークのループ制御方式 |
| JPH04215341A (ja) * | 1990-12-13 | 1992-08-06 | Sumitomo Electric Ind Ltd | データの受信タイミング補正装置 |
| JPH0750683A (ja) * | 1991-04-29 | 1995-02-21 | At & T Corp | 通信ネットワークと周波数同期確立方法 |
| US9654114B2 (en) | 2014-10-06 | 2017-05-16 | Socionext Inc. | Transmission circuit, integrated circuit, and parallel-to-serial conversion method |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0320177B2 (enrdf_load_stackoverflow) | 1991-03-18 |
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