JPS61244120A - 論理信号検出出力回路 - Google Patents

論理信号検出出力回路

Info

Publication number
JPS61244120A
JPS61244120A JP60085889A JP8588985A JPS61244120A JP S61244120 A JPS61244120 A JP S61244120A JP 60085889 A JP60085889 A JP 60085889A JP 8588985 A JP8588985 A JP 8588985A JP S61244120 A JPS61244120 A JP S61244120A
Authority
JP
Japan
Prior art keywords
field effect
transistor
effect transistor
circuit
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60085889A
Other languages
English (en)
Japanese (ja)
Other versions
JPH042009B2 (cg-RX-API-DMAC7.html
Inventor
Takakuni Doukan
隆国 道関
Yasuo Omori
康生 大森
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP60085889A priority Critical patent/JPS61244120A/ja
Publication of JPS61244120A publication Critical patent/JPS61244120A/ja
Publication of JPH042009B2 publication Critical patent/JPH042009B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09448—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET in combination with bipolar transistors [BIMOS]

Landscapes

  • Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
JP60085889A 1985-04-23 1985-04-23 論理信号検出出力回路 Granted JPS61244120A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60085889A JPS61244120A (ja) 1985-04-23 1985-04-23 論理信号検出出力回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60085889A JPS61244120A (ja) 1985-04-23 1985-04-23 論理信号検出出力回路

Publications (2)

Publication Number Publication Date
JPS61244120A true JPS61244120A (ja) 1986-10-30
JPH042009B2 JPH042009B2 (cg-RX-API-DMAC7.html) 1992-01-16

Family

ID=13871462

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60085889A Granted JPS61244120A (ja) 1985-04-23 1985-04-23 論理信号検出出力回路

Country Status (1)

Country Link
JP (1) JPS61244120A (cg-RX-API-DMAC7.html)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01157119A (ja) * 1987-12-14 1989-06-20 Hitachi Ltd 半導体回路
US6452422B1 (en) 1999-05-28 2002-09-17 Nec Corporation Interface circuit and operating method thereof
WO2010050543A1 (ja) * 2008-10-30 2010-05-06 ローム株式会社 レベルシフタ回路、負荷駆動装置、液晶表示装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5664518A (en) * 1979-10-30 1981-06-01 Nec Corp Integrated logic circuit
JPS5851621A (ja) * 1981-09-22 1983-03-26 Fujitsu Ltd 電子回路
JPS60141019A (ja) * 1983-12-28 1985-07-26 Nec Corp 論理回路

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5664518A (en) * 1979-10-30 1981-06-01 Nec Corp Integrated logic circuit
JPS5851621A (ja) * 1981-09-22 1983-03-26 Fujitsu Ltd 電子回路
JPS60141019A (ja) * 1983-12-28 1985-07-26 Nec Corp 論理回路

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01157119A (ja) * 1987-12-14 1989-06-20 Hitachi Ltd 半導体回路
US6452422B1 (en) 1999-05-28 2002-09-17 Nec Corporation Interface circuit and operating method thereof
WO2010050543A1 (ja) * 2008-10-30 2010-05-06 ローム株式会社 レベルシフタ回路、負荷駆動装置、液晶表示装置

Also Published As

Publication number Publication date
JPH042009B2 (cg-RX-API-DMAC7.html) 1992-01-16

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