JPS61195058U - - Google Patents
Info
- Publication number
- JPS61195058U JPS61195058U JP1985078570U JP7857085U JPS61195058U JP S61195058 U JPS61195058 U JP S61195058U JP 1985078570 U JP1985078570 U JP 1985078570U JP 7857085 U JP7857085 U JP 7857085U JP S61195058 U JPS61195058 U JP S61195058U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- conductor
- disposed
- semiconductor element
- terminal conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004020 conductor Substances 0.000 claims description 7
- 239000000758 substrate Substances 0.000 claims description 3
- 239000000853 adhesive Substances 0.000 claims description 2
- 230000001070 adhesive effect Effects 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 claims 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Wire Bonding (AREA)
Description
第１図はこの考案の一実施例を示した断面図、
第２図は従来例を示す断面図である。 １……ＩＣチツプ、２，６……端子電極、４…
…基板、５……接続導電体、７……接着剤。
第２図は従来例を示す断面図である。 １……ＩＣチツプ、２，６……端子電極、４…
…基板、５……接続導電体、７……接着剤。
Claims (1)
- 半導体素子が形成され、この半導体素子に接続
された端子導電体が表面に配設されてなる集積回
路と、この集積回路の端子導電体と接続される接
続導電体を有する配線導電体が表面に形成された
弾性を有する基板と、前記集積回路の端子導電体
と前記基板の接続導電体とを圧接して接着固定す
る接着剤とを具備することを特徴とする集積回路
の取付構造。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985078570U JPS61195058U (ja) | 1985-05-28 | 1985-05-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1985078570U JPS61195058U (ja) | 1985-05-28 | 1985-05-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61195058U true JPS61195058U (ja) | 1986-12-04 |
Family
ID=30622663
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1985078570U Pending JPS61195058U (ja) | 1985-05-28 | 1985-05-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61195058U (ja) |
-
1985
- 1985-05-28 JP JP1985078570U patent/JPS61195058U/ja active Pending