JPS61196531U - - Google Patents

Info

Publication number
JPS61196531U
JPS61196531U JP7238185U JP7238185U JPS61196531U JP S61196531 U JPS61196531 U JP S61196531U JP 7238185 U JP7238185 U JP 7238185U JP 7238185 U JP7238185 U JP 7238185U JP S61196531 U JPS61196531 U JP S61196531U
Authority
JP
Japan
Prior art keywords
semiconductor chip
glass substrate
terminal
wire
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7238185U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7238185U priority Critical patent/JPS61196531U/ja
Publication of JPS61196531U publication Critical patent/JPS61196531U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Wire Bonding (AREA)

Description

【図面の簡単な説明】
第1図は本考案半導体チツプの装着構造を示す
斜視図、第2図は第1図におけるA―A′断面図
、第3図は従来の装着構造を示す斜視図である。 1,6…ガラス基板、2,8…半導体チツプ、
3,3…9,9…ボンデイングパツド、5,5…
11,11…ワイヤ、7,7…12,12…端子
、10…フレキシブルプリント基板、13…異方
性導電膜。

Claims (1)

    【実用新案登録請求の範囲】
  1. ガラス基板上に半導体チツプを装着する装着構
    造において、ガラス基板上に設けられた第1の端
    子と、上記半導体チツプが取り付けられるフレキ
    シブルプリント基板に設けられ、上記半導体チツ
    プとワイヤボンドがされる第2の端子と、このフ
    レキシブルプリント基板とガラス基板間に介在さ
    れる異方性導電膜と、から成り、ワイヤ、第2の
    端子、異方性導電膜及び第1の端子を介して上記
    半導体チツプとガラス基板との電気的接続を採る
    ことを特徴とした半導体チツプの装着構造。
JP7238185U 1985-05-16 1985-05-16 Pending JPS61196531U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7238185U JPS61196531U (ja) 1985-05-16 1985-05-16

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7238185U JPS61196531U (ja) 1985-05-16 1985-05-16

Publications (1)

Publication Number Publication Date
JPS61196531U true JPS61196531U (ja) 1986-12-08

Family

ID=30610743

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7238185U Pending JPS61196531U (ja) 1985-05-16 1985-05-16

Country Status (1)

Country Link
JP (1) JPS61196531U (ja)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5258368A (en) * 1975-11-10 1977-05-13 Oki Electric Ind Co Ltd Small-sized electronic part

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5258368A (en) * 1975-11-10 1977-05-13 Oki Electric Ind Co Ltd Small-sized electronic part

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