JPS6119107B2 - - Google Patents
Info
- Publication number
- JPS6119107B2 JPS6119107B2 JP13549579A JP13549579A JPS6119107B2 JP S6119107 B2 JPS6119107 B2 JP S6119107B2 JP 13549579 A JP13549579 A JP 13549579A JP 13549579 A JP13549579 A JP 13549579A JP S6119107 B2 JPS6119107 B2 JP S6119107B2
- Authority
- JP
- Japan
- Prior art keywords
- bonding
- glass fibers
- solder
- thin film
- solder bumps
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003365 glass fiber Substances 0.000 claims description 19
- 229910000679 solder Inorganic materials 0.000 claims description 17
- 239000000758 substrate Substances 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 8
- 239000004065 semiconductor Substances 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 239000011888 foil Substances 0.000 claims 2
- 239000010409 thin film Substances 0.000 description 7
- 238000007796 conventional method Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01024—Chromium [Cr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13549579A JPS5660025A (en) | 1979-10-19 | 1979-10-19 | Bonding method for semiconductor element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13549579A JPS5660025A (en) | 1979-10-19 | 1979-10-19 | Bonding method for semiconductor element |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5660025A JPS5660025A (en) | 1981-05-23 |
JPS6119107B2 true JPS6119107B2 (enrdf_load_stackoverflow) | 1986-05-15 |
Family
ID=15153066
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13549579A Granted JPS5660025A (en) | 1979-10-19 | 1979-10-19 | Bonding method for semiconductor element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5660025A (enrdf_load_stackoverflow) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6021534A (ja) * | 1983-07-15 | 1985-02-02 | Seiko Epson Corp | 回路実装構造 |
JP4104889B2 (ja) * | 2002-03-29 | 2008-06-18 | 株式会社東芝 | 光半導体装置 |
US7232740B1 (en) | 2005-05-16 | 2007-06-19 | The United States Of America As Represented By The National Security Agency | Method for bumping a thin wafer |
-
1979
- 1979-10-19 JP JP13549579A patent/JPS5660025A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5660025A (en) | 1981-05-23 |
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