JPS61188366U - - Google Patents

Info

Publication number
JPS61188366U
JPS61188366U JP7063485U JP7063485U JPS61188366U JP S61188366 U JPS61188366 U JP S61188366U JP 7063485 U JP7063485 U JP 7063485U JP 7063485 U JP7063485 U JP 7063485U JP S61188366 U JPS61188366 U JP S61188366U
Authority
JP
Japan
Prior art keywords
transistor
emitter
field effect
semiconductor device
parallel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7063485U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7063485U priority Critical patent/JPS61188366U/ja
Publication of JPS61188366U publication Critical patent/JPS61188366U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の略式断面図、第2
図は本考案の等価電気回路である。 1……半導体基板、2……エピタキシヤル層、
3……第2のトランジスタのベース、第1のトラ
ンジスタのドレイン、4……第2のトランジスタ
のエミツタ、5……第3のトランジスタのゲート
、6……第1のトランジスタのソース、7……第
1のトランジスタのゲート、13……第1のトラ
ンジスタ、14……第2のトランジスタ、15…
…第3のトランジスタ、16……コレクタ端子、
17……エミツタ端子、18……ゲート端子。
Fig. 1 is a schematic sectional view of one embodiment of the present invention;
The figure shows an equivalent electric circuit of the present invention. 1... Semiconductor substrate, 2... Epitaxial layer,
3... Base of the second transistor, drain of the first transistor, 4... Emitter of the second transistor, 5... Gate of the third transistor, 6... Source of the first transistor, 7... Gate of first transistor, 13...first transistor, 14...second transistor, 15...
...Third transistor, 16...Collector terminal,
17... Emitter terminal, 18... Gate terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体本体内にモノリシツクに集積化されたダ
ーリントン回路を具え、このダーリントン回路の
入力トランジスタを第1のトランジスタとし、出
力トランジスタを第2のトランジスタとする時、
第1のトランジスタを横方向エンハンスメント形
絶縁ゲートの電界効果トランジスタで形成し、第
2のトランジスタを縦方向バイポーラパワートラ
ンジスタで形成した半導体素子において、前記第
1のトランジスタに対し反対の導電型を有する横
方向ノーマリオン形接合電界効果トランジスタに
より形成された第3のトランジスタを設け、この
第3のトランジスタを第2のトランジスタのエミ
ツタ、ベース間接合と並列に接続し、第1と第3
のトランジスタのゲート電極どうしを相互に接続
したことを特徴とする複合型電力用半導体素子。
When a Darlington circuit is monolithically integrated in a semiconductor body, and the input transistor of the Darlington circuit is a first transistor and the output transistor is a second transistor,
In the semiconductor device, the first transistor is formed by a lateral enhancement type insulated gate field effect transistor, and the second transistor is formed by a vertical bipolar power transistor. A third transistor formed by a normally-on junction field effect transistor is provided, the third transistor is connected in parallel with the emitter-base junction of the second transistor, and the third transistor is connected in parallel with the emitter-base junction of the second transistor.
A composite power semiconductor device characterized in that the gate electrodes of the transistors are interconnected.
JP7063485U 1985-05-15 1985-05-15 Pending JPS61188366U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7063485U JPS61188366U (en) 1985-05-15 1985-05-15

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7063485U JPS61188366U (en) 1985-05-15 1985-05-15

Publications (1)

Publication Number Publication Date
JPS61188366U true JPS61188366U (en) 1986-11-25

Family

ID=30607392

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7063485U Pending JPS61188366U (en) 1985-05-15 1985-05-15

Country Status (1)

Country Link
JP (1) JPS61188366U (en)

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